Clock not running (was Re: RTEMS4.7 and its tool chain (Re: powerpc mvme5500 clock off by factor of 150))

Till Straumann strauman at slac.stanford.edu
Wed Mar 9 20:22:27 UTC 2005


Sergei Organov wrote:

>Till Straumann <strauman at slac.stanford.edu> writes:
>
>  
>
>>Peter Dufault wrote:
>>    
>>
>>>On Mar 8, 2005, at 9:46 PM, Till Straumann wrote:
>>>      
>>>
>>>>Hmm - I smell something: could you try to insert a '&' after the '=' ?
>>>>
>>>>asm volatile ("mfdec %0; add %0, %0, %1; mtdec %0":"=&r"(decr):"r"(Clock_Decrementer_value));
>>>>        
>>>>
>>>It's working.  Thanks, you're Hero of the Day. Can you translate into
>>>English, or into C?
>>>      
>>>
>>I must shamefully decline - I feel more like the loser of the day since I'm
>>actually responsible for that bug, sorry.
>>
>> From the gcc manual:
>>    
>>
>
>[...]
>
>Well, instead of wrestling with fancy GCC inline assembler features
>almost nobody understands anyway, why not to write it simply as:
>
>    int dec;
>    asm volatile ("mfdec %0": "=r" (dec));
>    asm volatile ("mtdec %0": : "r" (dec + Clock_Decrementer_value));
>
>that gives exactly the same result as the above at any reasonable level
>of optimization?
>
not quite :-) -- the original statement modifies 'dec' (its value is 
used further down the line) so
you would have to say
  asm volatile("mtdec %0"::"r"(dec+=Clock_Decrementer_value));
[just to make the point that cleaning up asms is in itself a tricky 
business].

>
>Better yet, should PowerPC port define:
>
>#define MFDEC(dec_) asm volatile ("mfdec %0": "=r" (dec_))
>#define MTDEC(dec_) asm volatile ("mtdec %0": : "r" (dec_))
>  
>
You are right. However, in this particular case I wanted
to make sure the update is as fast as possible since any lost
cycles add up over time. If statements are split into multiple asm()s
the compiler is free to reallocate registers and the generated
code could (but probably will not) be suboptimal.

BTW: I should also have disabled interrupts around the update
     to avoid the race condition [higher priority IRQ between mfdec and 
mtdec].

T.




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