How to mask IRQ

[leonp at plris.com]

Eric, thank you for reply.

On Sunday, 29 בMay 2005 15:42, Eric Valette wrote:
> leonp at plris.com wrote:
> > 	I need to mask, for example, IRQ5 interrupt from within the ISR.
>
> You mean while handling another IRQ (e.g IRQ 4) I guess?
In my case - both. When I have received IRQ5, i need to mask itself and IRQ4 
too.


> > 	Today's implementation seems not to allow this operation, as the ISR is
> > called from the IRQ dispatcher, which restores the mask state to the
> > value it saved before the ISR was called.
> > 	The most simple decision I see, is to return the desired mask as a
> > return value from the ISR function. Thus, the dispatcher must check that
> > the ISR return value is not zero.
>
> In the MPC860, there is a way to mask automatically other interrupts
> when a dedicated interrupt occur (at least at the CPM level) I do not
> remember for the SIU. Its from memory as I do not have the source handy...
>
> In theory, the masks in the interrupt controller enables to define a set
> of interrupt blocked on a per irq basis. Check the sources I think there
> is a mask somewhere...
Hmmm, may be I miss something.
The dispatcher code I see in general looks like:

void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
{
register unsigned oldMask;                  /* old siu pic masks */
.......
    oldMask = ppc_cached_irq_mask;
    ppc_cached_irq_mask = oldMask & SIU_IvectMask[irq];
...
   rtems_hdl_tbl[irq].hdl(irq);
....
    ppc_cached_irq_mask = oldMask;
    ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
		ppc_cached_irq_mask;
...
}

I do not understand how the current value may be masked without changing 
oldMask from within this code.

Thanks again.

-- 
Leon M.Pollak