ss555 BSP, exception table location (as set in iss555.c)

David Querbach querbach at
Mon Oct 31 20:34:03 UTC 2005

On Sat, Oct 29, 2005 at 02:27:47AM +1000, Andreas Pfeil wrote:

> in the startup code for the ss555 BSP, at the end of the _InitSS555 
> function, exception table relocation is activated.
>   _CPU_MSR_GET(msr);
>   msr |= MSR_IP;                /* set prefix for exception relocation */
>   _CPU_MSR_SET(msr);
> As I understand it, this would make the CPU look for its exception 
> vector table at 0xFFF00000 to 0xFFF00100. - However, the .vectors 
> section is linked at address 0x0 to 0x100.

In the MPC555, the Burst Buffer Controller can be programmed to remap the
exception table into a much smaller space.  The CPU thinks it's fetching the
first instruction of an interrupt handler from a standard table 0xFFF00000,
but the BBC remaps the access to a much smaller table at 0x00000000.  See
sections 3.11.5 and 4.5 of the MPC555 User's Manual for a description of the


David Querbach
Real-Time Systems Inc.
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