RTEMS code documentation references

[Luís Henriques]

Dear Joel,

While analysing the ERC32 specific code from RTEMS, I found 2 references
to documentation which I could not trace.  These references are both in
file c/src/exec/score/cpu/sparc/erc32.h (still on the old RTEMS tree - I
am using 4.5.0 version):

73 /*
74  *  Trap Types for on-chip peripherals
75  *
76  *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
77  *
78  *  NOTE: The priority level for each source corresponds to the least
79  *        significant nibble of the trap type.
80  */
81
82 #define ERC32_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)

[ . . . ]

90 /*
91  *  Structure for ERC32 memory mapped registers.
92  *
93  *  Source: Section 3.25.2 - Register Address Map
94  *
95  *  NOTE:  There is only one of these structures per CPU, its base address
96  *         is 0x01f80000, and the variable MEC is placed there by the
97  *         linkcmds file.
98  */

Of course, these references refer to ERC32 documentation.  Could you
please provide me with the exact documents reference (name, version,
date, ...)?

Thanks a lot.

--
Luís Henriques