interrupt levels

[Allan Hessenflow]

I'm adding interrupt support to my ARC port, and I'm trying to understand
how RTEMS expects interrupt levels to work.  Is the level used by
_CPU_ISR_Set_level() equivalent to the levels used by _CPU_ISR_Disable()/
_CPU_ISR_Enable()?  Also, who is responsible for setting that level to
enable interrupts?  I did a quick grep and didn't see who is doing it,
just a lot of disable/enable pairs.

allan

-- 
Allan N. Hessenflow      allanh at kallisti.com