possible SPARC cpu_asm.S error
Jerry Needell
jerry.needell at unh.edu
Tue Aug 15 13:11:14 UTC 2006
Jiri -
Jiri Gaisler wrote:
>In my opinion, the nops are not needed since only global registers
>are used in the sequence:
>
> mov %g1, %psr ! restore status register and
> ! **** DISABLE TRAPS ****
> mov %wim, %g2 ! g2 = wim
> mov 1, %g4
> sll %g4, %g3, %g4 ! g4 = WIM mask for CW invalid
>
>If the problem is interrupt related, the bug might be elsewhere.
>
>
I agree here, but I added the nops just to be safe :-)
What about the section at the end of ISR_Dispatch? Don't we have to have
the nop's before the jmp?
good_task_window:
mov %l0, %psr ! **** DISABLE TRAPS ****
nop; nop; nop; ! Need three nops for pipeline
! and restore condition codes.
ld [%g1 + ISF_G1_OFFSET], %g1 ! restore g1
jmp %l1 ! transfer control and
rett %l2 ! go back to tasks window
This is where I thought my problem was occuring. I added the otheres
just to be safe.
>Do you have a test program that triggers the error? I have used
>the rtems-ttcp networking program and sent large ping floods to
>generate many interrupts, but I saw no crash.
>
>
I am trying to isolate a good example. It is hard because it seems to go
away when I "think" I have found the error.
>Regarding the -mv8 option to leon3, it should not be made default.
>There are leon3 systems without hardware mul/div for which this
>option will not work. The kernel does not do a lot of multiplication,
>so the -mv8 should only be used when compiling applications, not
>the kernel.
>
>
I agree! I only added this as an example of what I was doing.
- Jerry
>Jiri.
>
>Jerry Needell wrote:
>
>
>>I think I have found an error in the cpukit/score/cpu/sparc/cpu_asm.S
>>code. When writing to the PSR, a sequence of three NOP's must be added
>>to ensure that the PSR value is properly set after running through the
>>pipeline. This is done in most places in cpu_asm.S but was left out in a
>>few and, I think, causing me some problems. I have been trying to track
>>down and intermittent crash for a long time! My application was crashing
>>after servicing an interrupt. cpu_asm.S includes ISR_Dispatch which was
>>missing the NOP's ater setting the PSR before returning.
>>
>> The problem became much worse when I tried rebuilding 4.6.99.3 using
>>the -mcpu-v8 flag to take advantage of the SPARC V8 multiply in the
>>LEON3. The diff attached also has the change I made to
>>make/custom/leon3.cfg to set the -mcpu=v8 switch. The
>>cpu-asm.S error should apply to all SPARC cpu's (v7 or v8).
>>
>>
>>- Jerry
>>
>>
>>
>>------------------------------------------------------------------------
>>
>>Index: cpukit/score/cpu/sparc/cpu_asm.S
>>===================================================================
>>RCS file: /usr1/CVS/rtems/cpukit/score/cpu/sparc/cpu_asm.S,v
>>retrieving revision 1.11
>>diff -u -r1.11 cpu_asm.S
>>--- cpukit/score/cpu/sparc/cpu_asm.S 1 Apr 2004 10:12:49 -0000 1.11
>>+++ cpukit/score/cpu/sparc/cpu_asm.S 15 Aug 2006 11:47:40 -0000
>>@@ -212,6 +212,7 @@
>> andn %g1, SPARC_PSR_ET_MASK | SPARC_PSR_CWP_MASK, %g1
>> or %g1, %g3, %g1 ! g1 = heirs psr
>> mov %g1, %psr ! restore status register and
>>+ nop; nop; nop; ! Need three nops for pipeline
>> ! **** DISABLE TRAPS ****
>> mov %wim, %g2 ! g2 = wim
>> mov 1, %g4
>>@@ -605,6 +606,7 @@
>> */
>>
>> mov %l0, %psr ! **** DISABLE TRAPS ****
>>+ nop; nop; nop; ! Need three nops for pipeline
>>
>> /*
>> * Decrement ISR nest level and Thread dispatch disable level.
>>@@ -798,6 +800,7 @@
>> good_task_window:
>>
>> mov %l0, %psr ! **** DISABLE TRAPS ****
>>+ nop; nop; nop; ! Need three nops for pipeline
>> ! and restore condition codes.
>> ld [%g1 + ISF_G1_OFFSET], %g1 ! restore g1
>> jmp %l1 ! transfer control and
>>Index: make/custom/leon3.cfg
>>===================================================================
>>RCS file: /usr1/CVS/rtems/make/custom/leon3.cfg,v
>>retrieving revision 1.2
>>diff -u -r1.2 leon3.cfg
>>--- make/custom/leon3.cfg 9 Jan 2006 15:09:55 -0000 1.2
>>+++ make/custom/leon3.cfg 15 Aug 2006 11:47:41 -0000
>>@@ -20,7 +20,7 @@
>> # CPU_CFLAGS = -mno-v8 -mcypress $(MSOFT_FLOAT)
>> # -mcpu=cypress says to optimize for a Cypress 60x chipset
>> #CPU_CFLAGS = -mcpu=cypress $(MSOFT_FLOAT)
>>-CPU_CFLAGS = -mcpu=cypress -msoft-float
>>+CPU_CFLAGS = -mcpu=v8 -msoft-float
>>
>> # optimize flag: typically -0, could use -O4 or -fast
>> # -O4 is ok for RTEMS
>>
>>
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