Mask interrupts from inside the ISR
Thomas.Doerfler at embedded-brains.de
Thu Jan 22 09:57:20 UTC 2009
Leon Pollak wrote:
> On Wednesday January 21 2009, Thomas Doerfler wrote:
>> it really depends on WHERE you want to block the interrupt. In typical
> In MPC8260 most of the interrupts are exactly in these registers which
> are "cached" by the dispatcher.
Please note, that at a given time there may be multiple instances of the
"dispatcher" code active, and each reads out the previous value of the
mask register, stores it in a local variable on the stack and then
modifies the mask register. So you cannot simply move the stored/caches
mask register value into a global mask variable.
On the other hand, it might be feasible to define a "global mask
interrupt source" function/macro, which:
- modifies the mask register directly
- and also modifies a global mask variable
The dispatcher code would have to observe this global mask variable, and
when restoring the previous mask register value, it would have to make
sure that bits that are set in the global mask variable will NOT be
reenabled in the mask register.
Note that we would need a similar function/macro to reenable interrupt
sources, and the interaction between the "disable" "enable" and
dispatcher functions will be quite complicated.
The better way would ALWAYS be to have an additional disable facility
for (internal and external) interrupts.
> Anyway, I need to block the IRQ3, which is definitely cached and I do not see
> any other way, except taking out these masks to the "global" area and
> providing a function to change their value.
> But I would like to have the society opinion on the issue before I do this...
> Thanks a lot.
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