Mask interrupts from inside the ISR
sebastian.huber at embedded-brains.de
Thu Jan 22 09:12:17 UTC 2009
Leon Pollak wrote:
> On Wednesday January 21 2009, Till Straumann wrote:
>> What BSP?
> This is relevant for 8xx and 82xx as I was able to check.
> But most of the PowerPC BSPs are derived from the same source and all irq.c
> files have the same structure...
You may have a look at (with Doxygen comments):
Very simple example BSP that use this framework:
For RTEMS shell support:
> On Wednesday January 21 2009, Thomas Doerfler wrote:
>> it really depends on WHERE you want to block the interrupt. In typical
> In MPC8260 most of the interrupts are exactly in these registers which
> are "cached" by the dispatcher.
> Anyway, I need to block the IRQ3, which is definitely cached and I do not see
> any other way, except taking out these masks to the "global" area and
> providing a function to change their value.
> But I would like to have the society opinion on the issue before I do this...
> Thanks a lot.
Sebastian Huber, Embedded Brains GmbH
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