Mask interrupts from inside the ISR

[Sebastian Huber]

Leon Pollak wrote:
> On Wednesday January 21 2009, Till Straumann wrote:
>> What BSP?
> This is relevant for 8xx and 82xx as I was able to check.
> But most of the PowerPC BSPs are derived from the same source and all irq.c 
> files have the same structure...

You may have a look at (with Doxygen comments):

c/src/lib/libbsp/shared/include/irq-config.h
c/src/lib/libbsp/shared/include/irq-generic.h
c/src/lib/libbsp/shared/src/irq-generic.c
c/src/lib/libbsp/shared/src/irq-legacy.c

Very simple example BSP that use this framework:

c/src/lib/libbsp/powerpc/mpc55xxevb/include/irq-config.h
c/src/lib/libcpu/powerpc/mpc55xx/include/irq.h
c/src/lib/libcpu/powerpc/mpc55xx/irq/irq.c

Other BSPs:

c/src/lib/libbsp/powerpc/gen83xx
c/src/lib/libbsp/powerpc/gen5200
c/src/lib/libbsp/arm/lpc24xx

For RTEMS shell support:

c/src/lib/libbsp/shared/include/irq-info.h
c/src/lib/libbsp/shared/src/irq-info.c
c/src/lib/libbsp/shared/src/irq-shell.c

> 
> On Wednesday January 21 2009, Thomas Doerfler wrote:
>> it really depends on WHERE you want to block the interrupt. In typical
> ...........
> In MPC8260 most of the interrupts are exactly in these registers which 
> are "cached" by the dispatcher.
> 
> Anyway, I need to block the IRQ3, which is definitely cached and I do not see 
> any other way, except taking out these masks to the "global" area and 
> providing a function to change their value.
> 
> But I would like to have the society opinion on the issue before I do this...
> 
> Thanks a lot.


-- 
Sebastian Huber, Embedded Brains GmbH

Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone   : +49 89 18 90 80 79-6
Fax     : +49 89 18 90 80 79-9
E-Mail  : sebastian.huber at embedded-brains.de
PGP     : Public key available on request

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.