Coldfire uC5282 Question

[Thomas Dörfler]

Joel,

according to the ColdFire Family Programmer's Reference Manual Rev3,
page 4-74, this bit coding is not legal.

The Coldfire supports the Scc instruction only for Byte Operands (e.g.
sf.b %d2) This would generate an opcode of 51c2, not 51ca

Either you fed GCC with wrong input, or it produces wrong output. :-(

Good luck,

Thomas.


On 30.03.2010 19:48, Joel Sherrill wrote:
> Hi,
> 
> I am running gcc testsuite on the qemu uC5282
> simulator.  I am getting a number of failures
> where qemu says an illegal instruction was
> encountered.  Can a coldfire person out there
> tell me whether this is qemu not supporting
> a valid coldfire instruction or this instruction
> should not be generated by gcc with the -mcpu=5282
> option
> 
> [joel at rtbf64b gcc]$ m68k-rtems4.10-objdump -da zero-struct-2.x7 | grep
> -i "51 ca"
> [joel at rtbf64b gcc]$ m68k-rtems4.10-objdump -da zero-struct-2.x7 | grep
> -i "5186c"
>    5186c:    51ca               sf %d2
> 
> 
> $ uC5282 -i zero-struct-2.x7
> /users/joel/qemu-coverage/install/bin/qemu-system-m68k is
> /users/joel/qemu-coverage/install/bin/qemu-system-m68k
> qemu: fatal: Illegal instruction: 51ca @ 0005186c
> D0 = 00000000   A0 = 00063b98   F0 = 0000000000000000 (           0)
> D1 = 00000034   A1 = 00063186   F1 = 0000000000000000 (           0)
> D2 = 00000000   A2 = 00063b98   F2 = 0000000000000000 (           0)
> D3 = 000615e6   A3 = 00000000   F3 = 0000000000000000 (           0)
> D4 = 00000034   A4 = 00000000   F4 = 0000000000000000 (           0)
> D5 = 00000000   A5 = 00000000   F5 = 0000000000000000 (           0)
> D6 = 00000000   A6 = 2000ffcc   F6 = 0000000000000000 (           0)
> D7 = 00000000   A7 = 2000ffa0   F7 = 0000000000000000 (           0)
> PC = 00051864   SR = 2700 ----- FPRESULT =            0
> [joel at rtbf64b gcc]$ uC5282 zero-struct-2.x7^C
> 
> Thanks.
> 


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