Debugging basic BSP tasking functionality

[Joel Sherrill]

On 4/17/2013 10:13 AM, Sebastian Huber wrote:
> On 04/17/2013 04:04 PM, Matthew J Fletcher wrote:
>> Hi,
>>
>> Yes it the stack pointer out of range, because the current stack pointer
>> returned by GCC _builtin_frame_XX in the IDLE thread looks like its actually
>> that from the Init() thread.
> In a thread dispatch from Init (running and deleted) to idle (heir) the sp in
> the stack check extension must the sp of the Init thread.
Since this is after the first "real task switch" and the APCS frame 
option set, I
wonder if the context switch saves/restores all the required registers 
for APCS.

Since no other BSP uses this option, it looks like a zebra.
>
>>
>> Thinking this through,my target is Thumb, so the C interrupt handler should be
>> in a arm file with -mthumb-interwork set on the compile line.
> I am not sure if ARM/Thumb interwork works.
>
>> I guess GCC can not auto-magicly know what particular functions are interrupts,
>> so should there be some entry/exit functions to save/restore the stack, etc,
>> like these...
>>
>> http://www.procyonengineering.com/embedded/arm/armlib/docs/html/group__processor__lpc2000.html
>>
>> ISR_ENTRY / ISR_EXIT
> The interrupt entry/exit code is here:
>
> cpukit/score/cpu/arm/arm_exc_interrupt.S
>


-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985