SMP on Xilinx Zynq

Maldonado, Sergio E. smaldona at slac.stanford.edu
Sat Feb 28 18:38:54 UTC 2015


Hello,

Attempting to get SMP working on my Xilinx Zynq platform.  
I'm currently running RTEMS compiled from the head of the git repo master branch (as of 2/28/15), so I should have the latest updates.

The problem I have is that multitasking does not work when both cores are enabled.

I'm looking for some input on what could be going wrong and how to fix it.

Scenario:

At system boot, I can verify that core 0 completes RTEMS boot_card initialization, and starts multitasking.
However, Core 0 does _not_ execute the Init task entry point and instead goes straight to its idle loop.

Meanwhile, Core 1 starts and executes until it reaches the first _CPU_Context_Switch/_CPU_Context_Restore call.
If I step into Core 1, I can see that it never returns from this routine and stays in an infinite loop of the following instructions:

83		bne	.L_check_thread_dispatch_necessary
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:131
131		GET_SELF_CPU_CONTROL	r2, r3
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:134
134		ldrb	r4, [r2, #PER_CPU_DISPATCH_NEEDED]
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:135
135		cmp	r4, #0
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:136
136		beq	.L_check_is_executing
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:80
80		add	r3, r1, #ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:81
81		ldrexb	r4, [r3]
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:82
82		cmp	r4, #0
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:83
83		bne	.L_check_thread_dispatch_necessary
(gdb) s
?? ()
    at ../../../../../../../../src/c/src/../../cpukit/score/cpu/arm/cpu_asm.S:131
131		GET_SELF_CPU_CONTROL	r2, r3
(gdb) s
...


Consequently, the Init task entry point is never executed by either core, and the system does not complete startup.

Any thoughts on why Core 1 will not complete its transition to multitasking?

Here's a piece of information that might be useful:

When I configure RTEMS SMP with just 1 processor, the system successfully starts multitasking and the Init task entry point _does_ get executed by Core 0.

Thank you,

Sergio Maldonado - SLAC



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