Accessing physical memory on ARM

Chris Johns chrisj at
Thu Nov 12 06:39:17 UTC 2015

On 12/11/2015 5:26 PM, Sebastian Huber wrote:
> On 11/11/15 23:32, Adit Sahasrabudhe wrote:
>> It turns out it’s a cache issue. Our application has the FPGA on the
>> SoC writing data to the SDRAM. We ran another test where we made sure
>> the test buffer would create a cache miss and sure enough, the data is
>> read just fine.
>> So one last question then, since this data is only written by the
>> FPGA, it seems like I have two options:
>>  1. Create a new section in my linker script and configure the MMU for
>>     that section to not use cache (using startup/mmu_config.c in the BSP)
> You can use rtems_cache_coherent_allocate() or place global data into
> non-cacheable memory via the BSP_NOCACHE_SECTION and
> BSP_NOCACHENOLOAD_SECTION attributes (#include <bsp/linker-symbols.h>).

Thanks Sebastian.

Is there a documentation link describing this?

>>  1. Or, I can invalidate the cache whenever we want to read this
>>     buffer (not too often). Is there an API available to do cache
>>     invalidations? We tried the inline routines in arm-cp15.h, but it
>>     causes a fatal exception.
> Use the rtems_cache_*() routines for this.

A documentation link?


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