Zynq : Manual debugging of an RTEMS demo
chrisj at rtems.org
Thu Mar 31 21:30:54 UTC 2016
On 1/04/2016 2:04 AM, Badr El Hiouel wrote:
> I didn't get the printk working ..
Check the UART clock matches your hardware build, ie the system block in
the Xilinx hardware tool. There is a BSP_OPT. Check the configure.ac in
the BSP's top directory for the exact name. Add the BSP_OPT to your
configure command line.
The flexibility of what you can do with a Zynq makes things like clock
speeds in RTEMS source code difficult to manage. We have to have a clock
freq in the code and it will be wrong for some and will work for others.
> So, I looked for a new way for debuggin
> and finaly I got the Xilinx sdk debug the .elf. And when debugging it
> doesn't stop in the same line as the fist method ( XMD+gdb). But the
> problem of this , is when arriving to newlibc_exit.c the debugger stops and
> show me the error :
> Can't find a source file at
> Locate the file or edit the source lookup path to include its location.
> I searched for this file and I couldn't find it.
The RSB kindly cleans up for you after the build finishes. A simple
trick is to add '--no-clean' to the RSB set builder command and the full
source for libgcc and newlib will be available. You will then be able to
step around those libraries with full source code.
> I'm looking also to the openOCD way of debugging .. Maybe I'll get the
> adaptor from Avnet to try this, I'm just afraid to face the same problem.
Maybe, if it is a bug in the set up of the board it will still be there.
I can help more with OpenOCD than I can with the Xilinx tools. There are
more things to get sorted with OpenOCD, such as the patches need if they
have not been merged from their Gerrit tool, and your board's set up
script but once working it should be stable for the remainder of your
Plus I would hack the RTEMS code and add a printk some where you know
the code gets to and get that working. You will need to do this at some
point in time.
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