Zynq : Disabling cache for OCM

[Sw-Hw Eng]

Hello,

I'm porting an application to RTEMS and I was looking to a way to disable
the L2 cache using tlb attributes. The xilinx function I want to use is
this :

Extern u32 MMUTable

void Xil_SetTlbAttributes(u32 addr, u32 attrib)
{
	u32 *ptr;
	u32 section;

	section = addr / 0x100000;
	ptr = &MMUTable + section;
	*ptr = (addr & 0xFFF00000) | attrib;

	Xil_DCacheFlush();

	mtcp(XREG_CP15_INVAL_UTLB_UNLOCKED, 0);
	/* Invalidate all branch predictors */
	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0);

}

Can you please help me on how to do this calling the mmu table under RTEMS.
Alson do you have an idea how can I disable the UART output (STDOUT) ?


Best,
Damiens
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