Zynq : Disabling cache for OCM

[Chris Johns]

On 19/05/2016 6:47 PM, Sw-Hw Eng wrote:
> Hello,
>
> I'm porting an application to RTEMS and I was looking to a way to
> disable the L2 cache using tlb attributes. The xilinx function I want to
> use is this :
>
> Extern u32 MMUTable
>
> void Xil_SetTlbAttributes(u32 addr, u32 attrib)
> {
> 	u32 *ptr;
> 	u32 section;
>
> 	section = addr / 0x100000;
> 	ptr = &MMUTable + section;
> 	*ptr = (addr & 0xFFF00000) | attrib;
>
> 	Xil_DCacheFlush();
>
> 	mtcp(XREG_CP15_INVAL_UTLB_UNLOCKED, 0);
> 	/* Invalidate all branch predictors */
> 	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0);
>
> }
>
> Can you please help me on how to do this calling the mmu table under RTEMS.

Why not define the area as ARMV7_MMU_DEVICE in the MMU table to start 
with? If you look into what ARMV7_MMU_DEVICE is you will see the MMU 
flags used. If you do this there is no need to change the setting using 
the type of code yo posted.

Chris