Questions for SMP feature.

[Sebastian Huber]

On 16/03/17 10:12, Thomas Kim wrote:
> Dear Sir,
>
> I have used RTEMS 4.12 modified version for single core only of 
> i.MX6Q(Cortex-A9) until now.
> At this time, I am trying to add SMP feature from one core to four cores.

Please use the existing Cortex-A9 MPCore support used by the Xilinx Zynq 
and Altera Cyclone V BSPs.

>
> Because I have a problem regarding "RTEMS_FATAL_SOURCE_SMP", I am 
> trying to find a reason in my working version.
>
> As I know in RTEMS SMP booting sequence, after first RTEMS kernel on 
> master core(core0) is run, three RTEMS kernel entry on each core1, 
> core2, core3 is executed.
>
> At this time, RTEMS kernel on master core(core 0) initialize several 
> device initializations.
>  - console driver for debug port.
>  - additional serial driver for device I/O communication.
>  - file system for sd-card.
>  - framebuffer for LCD panel.
>
> I guess that RTEMS kernel on core1, core2, core3 will initialze same 
> device(console, sd-card, framebuffer) as like kernel on core0.
>
> Is this correct ?

No, only the boot processor will initialize the device drivers.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
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E-Mail  : sebastian.huber at embedded-brains.de
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