[altcycv_devkit] Access to FPGA Fabric via HPS2FPGA Bridge

[Sebastian Huber]

On 02/04/2019 11:08, Christian Spindeldreier wrote:
>
> We use a nightly build of the RTEMS master, but we do not see the 
> RTEMS Fault Manager, as some kind of ISR prints out the content of the 
> register file and performs a warm reset when any error occurs. I 
> assume that u-boot (2018.11) and the MPU Watchdogs are in charge of 
> this behavior but we havn't found the point to disable it yet. 

This looks like the default behaviour of the fatal BSP extension. Maybe 
it helps to build the BSP with the BSP_VERBOSE_FATAL_EXTENSION=1 
configure option, e.g.

configure ... BSP_VERBOSE_FATAL_EXTENSION=1

-- 
Sebastian Huber, embedded brains GmbH

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