device-tree example for altera-cyclone-v bsp

Christian Spindeldreier spindeldreier at
Thu Feb 14 12:54:52 UTC 2019

Hello Sebastian,

we had to change the BSP_ARM_A9MPCORE_PERIPHCLK frequency to 100 MHz as 
this is the frequency the L4 MP clock is set by Qsys or the SPL, 
respectively. This meant adding a second board to the altera-cyclone-v 
bsp differing only by this configuration option. Adapting the 
configuration as described enabled the upstream RTEMS-5 version to boot 
on the Terasic-DE10 Standard Board (

U-Boot itself contains a device-tree of the board it is running on, but 
i missed the u-boot command handing over the u-boot device-tree to rtems 
which expects the device-tree address in R6 on startup. If there is 
anything like this i am pleased on any information on it.

Best Regards,


Using the described settings we

On 13.02.19 19:57, Sebastian Huber wrote:
> Hello Christian,
> I add the BSP section to the user manual today. Unfortunately, I was not able to commit it. I tested also the latest RTEMS on the Cyclone V SoC Development Kit and it worked fine. Does it now run on your board? The device tree is normally provided by the U-Boot.

Dipl.-Ing. Christian Spindeldreier
Leibniz University Hannover (LUH)
Institute of Microelectronic Systems
Architectures and Systems Group
Appelstr. 4, 30167 Hannover, Germany

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