change log for rtems (2010-05-10)
rtems-vc at rtems.org
rtems-vc at rtems.org
Mon May 10 20:10:38 UTC 2010
*joel*:
2010-05-10 Joel Sherrill <joel.sherrilL at OARcorp.com>
* include/bsp.h: Add BSP_SMALL_MEMORY.
M 1.51 c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
M 1.5 c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.50 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.51
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.50 Fri Apr 30 06:59:05 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog Mon May 10 14:16:07 2010
@@ -1,3 +1,7 @@
+2010-05-10 Joel Sherrill <joel.sherrilL at OARcorp.com>
+
+ * include/bsp.h: Add BSP_SMALL_MEMORY.
+
2010-04-30 Sebastian Huber <sebastian.huber at embedded-brains.de>
* include/irq-config.h: Removed file.
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h:1.4 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h:1.5
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h:1.4 Thu Mar 25 15:26:00 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h Mon May 10 14:16:07 2010
@@ -35,6 +35,8 @@
extern "C" {
#endif /* __cplusplus */
+#define BSP_SMALL_MEMORY 1
+
#ifndef ASM
/** @brief System clock frequency */
*joel*:
2010-05-10 Joel Sherrill <joel.sherrilL at OARcorp.com>
* context_init.c, context_switch.S, cpu.c: Now builds multilib. R8C
paths produce warnings for now.
M 1.11 cpukit/score/cpu/m32c/ChangeLog
M 1.6 cpukit/score/cpu/m32c/context_init.c
M 1.5 cpukit/score/cpu/m32c/context_switch.S
M 1.8 cpukit/score/cpu/m32c/cpu.c
diff -u rtems/cpukit/score/cpu/m32c/ChangeLog:1.10 rtems/cpukit/score/cpu/m32c/ChangeLog:1.11
--- rtems/cpukit/score/cpu/m32c/ChangeLog:1.10 Sun Apr 25 17:17:35 2010
+++ rtems/cpukit/score/cpu/m32c/ChangeLog Mon May 10 15:08:50 2010
@@ -1,3 +1,8 @@
+2010-05-10 Joel Sherrill <joel.sherrilL at OARcorp.com>
+
+ * context_init.c, context_switch.S, cpu.c: Now builds multilib. R8C
+ paths produce warnings for now.
+
2010-04-25 Joel Sherrill <joel.sherrilL at OARcorp.com>
* context_init.c: Eliminate warnings.
diff -u rtems/cpukit/score/cpu/m32c/context_init.c:1.5 rtems/cpukit/score/cpu/m32c/context_init.c:1.6
--- rtems/cpukit/score/cpu/m32c/context_init.c:1.5 Sun Apr 25 17:17:35 2010
+++ rtems/cpukit/score/cpu/m32c/context_init.c Mon May 10 15:08:50 2010
@@ -31,8 +31,13 @@
uint16_t zero;
} Starting_Frame;
-#define _get_sb( _sb ) \
- asm volatile( "stc sb, %0" : "=r" (_sb))
+#if defined(__r8c_cpu__)
+ #warning "_get_sb: not implemented on R8C"
+ #define _get_sb( _sb )
+#else
+ #define _get_sb( _sb ) \
+ asm volatile( "stc sb, %0" : "=r" (_sb))
+#endif
void _CPU_Context_Initialize(
Context_Control *the_context,
@@ -63,11 +68,14 @@
frame->a1 =0xa1a2a3a4;
frame->r0r2 = 0;
frame->r1r3 = 0;
+#if defined(__r8c_cpu__)
+ #warning "not implemented on R8C"
+#else
frame->frameLow = (uint16_t) (((uint32_t)frame) & 0xffff);
frame->frameHigh = (uint16_t) (((uint32_t)frame >> 16) & 0xffff);
frame->startLow = (uint16_t) (((uint32_t)entry_point) & 0xffff);
frame->startHigh = (uint16_t) (((uint32_t)entry_point >> 16) & 0xffff);
-
+#endif
the_context->sp = (uintptr_t)frame;
the_context->fb = (uintptr_t)&frame->frameLow;
}
diff -u rtems/cpukit/score/cpu/m32c/context_switch.S:1.4 rtems/cpukit/score/cpu/m32c/context_switch.S:1.5
--- rtems/cpukit/score/cpu/m32c/context_switch.S:1.4 Sat Mar 27 10:01:57 2010
+++ rtems/cpukit/score/cpu/m32c/context_switch.S Mon May 10 15:08:50 2010
@@ -31,6 +31,9 @@
pushc flg
pushc sb
+#if defined(__r8c_cpu__)
+ #warning "not implemented on R8C"
+#else
mov.l ARG_EXECUTING[fb],a0 ; a0 = executing
stc fb,a1
mov.l a1,CTXT_FB[a0] ; save fb
@@ -44,6 +47,7 @@
ldc a1,sp ; restore sp
mov.l CTXT_FB[a0],a1
ldc a1,fb ; restore fb
+#endif
popc sb
popc flg
popm a0,a1,r0,r1,r2,r3
@@ -56,5 +60,9 @@
.type __CPU_Context_Restart_self, @function
__CPU_Context_Restart_self:
enter #0
+#if defined(__r8c_cpu__)
+ #warning "__CPU_Context_Restart_self: not implemented on R8C"
+#else
mov.l ARG_RESTART[fb],a0 ; a0 = heir
jmp.s restore
+#endif
diff -u rtems/cpukit/score/cpu/m32c/cpu.c:1.7 rtems/cpukit/score/cpu/m32c/cpu.c:1.8
--- rtems/cpukit/score/cpu/m32c/cpu.c:1.7 Sat Mar 27 10:01:57 2010
+++ rtems/cpukit/score/cpu/m32c/cpu.c Mon May 10 15:08:50 2010
@@ -32,7 +32,9 @@
void _CPU_Initialize(void)
{
- asm volatile( "ldc #__var_vects,intb" );
+ #if !defined(__r8c_cpu__)
+ asm volatile( "ldc #__var_vects,intb" );
+ #endif
}
/*
@@ -70,7 +72,11 @@
* This is where we install the interrupt handler into the "raw" interrupt
* table used by the CPU to dispatch interrupt handlers.
*/
+#if defined(__r8c_cpu__)
+ #warning "_CPU_ISR_install_raw_handler not implemented on R8C"
+#else
_set_var_vect(new_handler,vector);
+#endif
}
/*PAGE
--
Generated by Deluxe Loginfo [http://www.codewiz.org/projects/index.html#loginfo] 2.122 by Bernardo Innocenti <bernie at develer.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/vc/attachments/20100510/d93c8f23/attachment-0001.html>
More information about the vc
mailing list