change log for rtems (2011-02-11)
rtems-vc at rtems.org
rtems-vc at rtems.org
Fri Feb 11 09:10:43 UTC 2011
*ralf*:
2010-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* stringto01/init.c: Redefine LONG_LONG_MAX and LONG_LONG_MIN
for c99.
M 1.254 testsuites/libtests/ChangeLog
M 1.4 testsuites/libtests/stringto01/init.c
diff -u rtems/testsuites/libtests/ChangeLog:1.253 rtems/testsuites/libtests/ChangeLog:1.254
--- rtems/testsuites/libtests/ChangeLog:1.253 Wed Feb 2 12:52:49 2011
+++ rtems/testsuites/libtests/ChangeLog Fri Feb 11 02:21:04 2011
@@ -1,3 +1,8 @@
+2010-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * stringto01/init.c: Redefine LONG_LONG_MAX and LONG_LONG_MIN
+ for c99.
+
2011-02-02 Joel Sherrill <joel.sherrilL at OARcorp.com>
* cpuuse/tswitch.c: Shrink memory requirements.
diff -u rtems/testsuites/libtests/stringto01/init.c:1.3 rtems/testsuites/libtests/stringto01/init.c:1.4
--- rtems/testsuites/libtests/stringto01/init.c:1.3 Mon Jul 19 08:10:48 2010
+++ rtems/testsuites/libtests/stringto01/init.c Fri Feb 11 02:21:04 2011
@@ -19,6 +19,15 @@
#define __STRING(x) #x /* stringify without expanding x */
#define __XSTRING(x) __STRING(x) /* expand x, then stringify */
+/* c99 has LLONG_MAX instead of LONG_LONG_MAX */
+#ifndef LONG_LONG_MAX
+#define LONG_LONG_MAX LLONG_MAX
+#endif
+/* c99 has LLONG_MIN instead of LONG_LONG_MIN */
+#ifndef LONG_LONG_MIN
+#define LONG_LONG_MIN LLONG_MIN
+#endif
+
/* Test pointer conversions */
#define TEST_STRING_TO_TYPE void *
#define TEST_STRING_TO_NAME test_rtems_string_to_pointer
*ralf*:
2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* rtems/score/cpu.h, rtems/score/sparc.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
M 1.101 cpukit/score/cpu/sparc/ChangeLog
M 1.39 cpukit/score/cpu/sparc/rtems/score/cpu.h
M 1.15 cpukit/score/cpu/sparc/rtems/score/sparc.h
diff -u rtems/cpukit/score/cpu/sparc/ChangeLog:1.100 rtems/cpukit/score/cpu/sparc/ChangeLog:1.101
--- rtems/cpukit/score/cpu/sparc/ChangeLog:1.100 Tue Nov 16 11:41:56 2010
+++ rtems/cpukit/score/cpu/sparc/ChangeLog Fri Feb 11 02:52:39 2011
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * rtems/score/cpu.h, rtems/score/sparc.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2010-11-16 Joel Sherrill <joel.sherrill at oarcorp.com>
* cpu.c: Remove unused variable reported by clang.
diff -u rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h:1.38 rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h:1.39
--- rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h:1.38 Thu Oct 21 17:17:37 2010
+++ rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h Fri Feb 11 02:52:39 2011
@@ -770,7 +770,7 @@
#define _CPU_Context_Initialization_at_thread_begin() \
do { \
- asm volatile ("set _Thread_Handler,%%i7\n"::); \
+ __asm__ volatile ("set _Thread_Handler,%%i7\n"::); \
} while (0)
/*
@@ -822,7 +822,7 @@
uint32_t level; \
\
level = sparc_disable_interrupts(); \
- asm volatile ( "mov %0, %%g1 " : "=r" (level) : "0" (level) ); \
+ __asm__ volatile ( "mov %0, %%g1 " : "=r" (level) : "0" (level) ); \
while (1); /* loop forever */ \
} while (0)
diff -u rtems/cpukit/score/cpu/sparc/rtems/score/sparc.h:1.14 rtems/cpukit/score/cpu/sparc/rtems/score/sparc.h:1.15
--- rtems/cpukit/score/cpu/sparc/rtems/score/sparc.h:1.14 Wed Dec 2 03:46:16 2009
+++ rtems/cpukit/score/cpu/sparc/rtems/score/sparc.h Fri Feb 11 02:52:39 2011
@@ -136,7 +136,7 @@
#define nop() \
do { \
- asm volatile ( "nop" ); \
+ __asm__ volatile ( "nop" ); \
} while ( 0 )
/*
@@ -146,12 +146,12 @@
#define sparc_get_psr( _psr ) \
do { \
(_psr) = 0; \
- asm volatile( "rd %%psr, %0" : "=r" (_psr) : "0" (_psr) ); \
+ __asm__ volatile( "rd %%psr, %0" : "=r" (_psr) : "0" (_psr) ); \
} while ( 0 )
#define sparc_set_psr( _psr ) \
do { \
- asm volatile ( "mov %0, %%psr " : "=r" ((_psr)) : "0" ((_psr)) ); \
+ __asm__ volatile ( "mov %0, %%psr " : "=r" ((_psr)) : "0" ((_psr)) ); \
nop(); \
nop(); \
nop(); \
@@ -164,12 +164,12 @@
#define sparc_get_tbr( _tbr ) \
do { \
(_tbr) = 0; /* to avoid unitialized warnings */ \
- asm volatile( "rd %%tbr, %0" : "=r" (_tbr) : "0" (_tbr) ); \
+ __asm__ volatile( "rd %%tbr, %0" : "=r" (_tbr) : "0" (_tbr) ); \
} while ( 0 )
#define sparc_set_tbr( _tbr ) \
do { \
- asm volatile( "wr %0, 0, %%tbr" : "=r" (_tbr) : "0" (_tbr) ); \
+ __asm__ volatile( "wr %0, 0, %%tbr" : "=r" (_tbr) : "0" (_tbr) ); \
} while ( 0 )
/*
@@ -178,12 +178,12 @@
#define sparc_get_wim( _wim ) \
do { \
- asm volatile( "rd %%wim, %0" : "=r" (_wim) : "0" (_wim) ); \
+ __asm__ volatile( "rd %%wim, %0" : "=r" (_wim) : "0" (_wim) ); \
} while ( 0 )
#define sparc_set_wim( _wim ) \
do { \
- asm volatile( "wr %0, %%wim" : "=r" (_wim) : "0" (_wim) ); \
+ __asm__ volatile( "wr %0, %%wim" : "=r" (_wim) : "0" (_wim) ); \
nop(); \
nop(); \
nop(); \
@@ -195,12 +195,12 @@
#define sparc_get_y( _y ) \
do { \
- asm volatile( "rd %%y, %0" : "=r" (_y) : "0" (_y) ); \
+ __asm__ volatile( "rd %%y, %0" : "=r" (_y) : "0" (_y) ); \
} while ( 0 )
#define sparc_set_y( _y ) \
do { \
- asm volatile( "wr %0, %%y" : "=r" (_y) : "0" (_y) ); \
+ __asm__ volatile( "wr %0, %%y" : "=r" (_y) : "0" (_y) ); \
} while ( 0 )
/*
*ralf*:
2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* cpu.c, rtems/score/mips.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
M 1.146 cpukit/score/cpu/mips/ChangeLog
M 1.36 cpukit/score/cpu/mips/cpu.c
M 1.24 cpukit/score/cpu/mips/rtems/score/mips.h
diff -u rtems/cpukit/score/cpu/mips/ChangeLog:1.145 rtems/cpukit/score/cpu/mips/ChangeLog:1.146
--- rtems/cpukit/score/cpu/mips/ChangeLog:1.145 Tue Jan 4 09:33:31 2011
+++ rtems/cpukit/score/cpu/mips/ChangeLog Fri Feb 11 02:54:08 2011
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * cpu.c, rtems/score/mips.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2011-01-04 Joel Sherrill <joel.sherrill at oarcorp.com>
* cpu_asm.S: _Thread_Executing was not used.
diff -u rtems/cpukit/score/cpu/mips/cpu.c:1.35 rtems/cpukit/score/cpu/mips/cpu.c:1.36
--- rtems/cpukit/score/cpu/mips/cpu.c:1.35 Sun Apr 25 16:37:46 2010
+++ rtems/cpukit/score/cpu/mips/cpu.c Fri Feb 11 02:54:08 2011
@@ -315,7 +315,7 @@
{
#if (__mips == 3) || (__mips == 32)
for( ; ; )
- asm volatile("wait"); /* use wait to enter low power mode */
+ __asm__ volatile("wait"); /* use wait to enter low power mode */
#elif __mips == 1
for( ; ; )
;
diff -u rtems/cpukit/score/cpu/mips/rtems/score/mips.h:1.23 rtems/cpukit/score/cpu/mips/rtems/score/mips.h:1.24
--- rtems/cpukit/score/cpu/mips/rtems/score/mips.h:1.23 Thu Dec 3 23:24:40 2009
+++ rtems/cpukit/score/cpu/mips/rtems/score/mips.h Fri Feb 11 02:54:08 2011
@@ -116,13 +116,13 @@
#define mips_get_sr( _x ) \
do { \
- asm volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
} while (0)
#define mips_set_sr( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
} while (0)
@@ -132,14 +132,14 @@
#define mips_get_cause( _x ) \
do { \
- asm volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
} while (0)
#define mips_set_cause( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
} while (0)
@@ -151,14 +151,14 @@
#define mips_get_dcic( _x ) \
do { \
- asm volatile( "mfc0 %0, $7; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $7; nop" : "=r" (_x) : ); \
} while (0)
#define mips_set_dcic( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "mtc0 %0, $7; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $7; nop" : : "r" (__x) ); \
} while (0)
@@ -171,8 +171,8 @@
#define mips_get_bpcrm( _x, _y ) \
do { \
- asm volatile( "mfc0 %0, $3; nop" : "=r" (_x) : ); \
- asm volatile( "mfc0 %0, $11; nop" : "=r" (_y) : ); \
+ __asm__ volatile( "mfc0 %0, $3; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $11; nop" : "=r" (_y) : ); \
} while (0)
@@ -180,8 +180,8 @@
do { \
register unsigned int __x = (_x); \
register unsigned int __y = (_y); \
- asm volatile( "mtc0 %0, $11; nop" : : "r" (__y) ); \
- asm volatile( "mtc0 %0, $3; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $11; nop" : : "r" (__y) ); \
+ __asm__ volatile( "mtc0 %0, $3; nop" : : "r" (__x) ); \
} while (0)
@@ -196,8 +196,8 @@
#define mips_get_bdarm( _x, _y ) \
do { \
- asm volatile( "mfc0 %0, $5; nop" : "=r" (_x) : ); \
- asm volatile( "mfc0 %0, $9; nop" : "=r" (_y) : ); \
+ __asm__ volatile( "mfc0 %0, $5; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $9; nop" : "=r" (_y) : ); \
} while (0)
@@ -205,8 +205,8 @@
do { \
register unsigned int __x = (_x); \
register unsigned int __y = (_y); \
- asm volatile( "mtc0 %0, $9; nop" : : "r" (__y) ); \
- asm volatile( "mtc0 %0, $5; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $9; nop" : : "r" (__y) ); \
+ __asm__ volatile( "mtc0 %0, $5; nop" : : "r" (__x) ); \
} while (0)
@@ -223,14 +223,14 @@
#define mips_get_fcr31( _x ) \
do { \
- asm volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
} while(0)
#define mips_set_fcr31( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
+ __asm__ volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
} while(0)
#else
*ralf*:
2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* context.c, cpu.c, rtems/score/cpu.h, rtems/score/sh.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
M 1.99 cpukit/score/cpu/sh/ChangeLog
M 1.3 cpukit/score/cpu/sh/context.c
M 1.22 cpukit/score/cpu/sh/cpu.c
M 1.36 cpukit/score/cpu/sh/rtems/score/cpu.h
M 1.20 cpukit/score/cpu/sh/rtems/score/sh.h
diff -u rtems/cpukit/score/cpu/sh/ChangeLog:1.98 rtems/cpukit/score/cpu/sh/ChangeLog:1.99
--- rtems/cpukit/score/cpu/sh/ChangeLog:1.98 Thu Oct 21 17:16:57 2010
+++ rtems/cpukit/score/cpu/sh/ChangeLog Fri Feb 11 02:56:10 2011
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * context.c, cpu.c, rtems/score/cpu.h, rtems/score/sh.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2010-10-21 Joel Sherrill <joel.sherrill at oarcorp.com>
* rtems/score/cpu.h: Add RTEMS_COMPILER_NO_RETURN_ATTRIBUTE to
diff -u rtems/cpukit/score/cpu/sh/context.c:1.2 rtems/cpukit/score/cpu/sh/context.c:1.3
--- rtems/cpukit/score/cpu/sh/context.c:1.2 Sat Mar 27 10:02:35 2010
+++ rtems/cpukit/score/cpu/sh/context.c Fri Feb 11 02:56:10 2011
@@ -201,7 +201,7 @@
:: "i" (sizeof(Context_Control))
);
- asm volatile("\n\
+ __asm__ volatile("\n\
.global __CPU_Context_restore\n\
__CPU_Context_restore:\n\
mov.l @r4+,r15\n\
diff -u rtems/cpukit/score/cpu/sh/cpu.c:1.21 rtems/cpukit/score/cpu/sh/cpu.c:1.22
--- rtems/cpukit/score/cpu/sh/cpu.c:1.21 Sun May 23 00:47:27 2010
+++ rtems/cpukit/score/cpu/sh/cpu.c Fri Feb 11 02:56:10 2011
@@ -113,7 +113,7 @@
#endif
/* get vbr */
- asm ( "stc vbr,%0" : "=r" (vbr) );
+ __asm__ ( "stc vbr,%0" : "=r" (vbr) );
*old_handler = vbr[vector] ;
vbr[vector] = new_handler ;
@@ -191,7 +191,7 @@
for( ; ; )
{
- asm volatile("nop");
+ __asm__ volatile("nop");
}
/* insert your "halt" instruction here */ ;
}
diff -u rtems/cpukit/score/cpu/sh/rtems/score/cpu.h:1.35 rtems/cpukit/score/cpu/sh/rtems/score/cpu.h:1.36
--- rtems/cpukit/score/cpu/sh/rtems/score/cpu.h:1.35 Thu Oct 21 17:16:57 2010
+++ rtems/cpukit/score/cpu/sh/rtems/score/cpu.h Fri Feb 11 02:56:10 2011
@@ -670,9 +670,9 @@
#else
#define _CPU_Fatal_halt( _error)\
{ \
- asm volatile("mov.l %0,r0"::"m" (_error)); \
- asm volatile("mov #1, r4"); \
- asm volatile("trapa #34"); \
+ __asm__ volatile("mov.l %0,r0"::"m" (_error)); \
+ __asm__ volatile("mov #1, r4"); \
+ __asm__ volatile("trapa #34"); \
}
#endif
diff -u rtems/cpukit/score/cpu/sh/rtems/score/sh.h:1.19 rtems/cpukit/score/cpu/sh/rtems/score/sh.h:1.20
--- rtems/cpukit/score/cpu/sh/rtems/score/sh.h:1.19 Thu Dec 3 23:25:30 2009
+++ rtems/cpukit/score/cpu/sh/rtems/score/sh.h Fri Feb 11 02:56:10 2011
@@ -104,14 +104,14 @@
#define SH_IRQDIS_VALUE 0xf0
#define sh_disable_interrupts( _level ) \
- asm volatile ( \
+ __asm__ volatile ( \
"stc sr,%0\n\t" \
"ldc %1,sr\n\t"\
: "=&r" (_level ) \
: "r" (SH_IRQDIS_VALUE) );
#define sh_enable_interrupts( _level ) \
- asm volatile( "ldc %0,sr\n\t" \
+ __asm__ volatile( "ldc %0,sr\n\t" \
"nop\n\t" \
:: "r" (_level) );
@@ -123,7 +123,7 @@
*/
#define sh_flash_interrupts( _level ) \
- asm volatile( \
+ __asm__ volatile( \
"ldc %1,sr\n\t" \
"nop\n\t" \
"ldc %0,sr\n\t" \
@@ -135,7 +135,7 @@
#define SH_IRQDIS_MASK 0xf0
#define sh_disable_interrupts( _level ) \
- asm volatile ( \
+ __asm__ volatile ( \
"stc sr,%0\n\t" \
"mov %0,r5\n\t" \
"or %1,r5\n\t" \
@@ -145,7 +145,7 @@
: "r5" );
#define sh_enable_interrupts( _level ) \
- asm volatile( "ldc %0,sr\n\t" \
+ __asm__ volatile( "ldc %0,sr\n\t" \
"nop\n\t" \
:: "r" (_level) );
@@ -157,7 +157,7 @@
*/
#define sh_flash_interrupts( _level ) \
- asm volatile( \
+ __asm__ volatile( \
"stc sr,r5\n\t" \
"ldc %1,sr\n\t" \
"nop\n\t" \
@@ -172,7 +172,7 @@
{ \
register uint32_t _tmpsr ; \
\
- asm volatile( "stc sr, %0" : "=r" (_tmpsr) ); \
+ __asm__ volatile( "stc sr, %0" : "=r" (_tmpsr) ); \
_level = (_tmpsr & 0xf0) >> 4 ; \
}
@@ -180,9 +180,9 @@
{ \
register uint32_t _tmpsr; \
\
- asm volatile ( "stc sr, %0" : "=r" (_tmpsr) ); \
+ __asm__ volatile ( "stc sr, %0" : "=r" (_tmpsr) ); \
_tmpsr = ( _tmpsr & ~0xf0 ) | ((_newlevel) << 4) ; \
- asm volatile( "ldc %0,sr" :: "r" (_tmpsr) ); \
+ __asm__ volatile( "ldc %0,sr" :: "r" (_tmpsr) ); \
}
/*
@@ -196,7 +196,7 @@
{
register uint32_t swapped;
- asm volatile (
+ __asm__ volatile (
"swap.b %1,%0; "
"swap.w %0,%0; "
"swap.b %0,%0"
@@ -212,7 +212,7 @@
{
register uint16_t swapped ;
- asm volatile ( "swap.b %1,%0" : "=r" (swapped) : "r" (value) );
+ __asm__ volatile ( "swap.b %1,%0" : "=r" (swapped) : "r" (value) );
return( swapped );
}
*ralf*:
2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* cpu.c, irq.c, rtems/score/lm32.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
M 1.20 cpukit/score/cpu/lm32/ChangeLog
M 1.8 cpukit/score/cpu/lm32/cpu.c
M 1.7 cpukit/score/cpu/lm32/irq.c
M 1.4 cpukit/score/cpu/lm32/rtems/score/lm32.h
diff -u rtems/cpukit/score/cpu/lm32/ChangeLog:1.19 rtems/cpukit/score/cpu/lm32/ChangeLog:1.20
--- rtems/cpukit/score/cpu/lm32/ChangeLog:1.19 Thu Oct 21 17:12:33 2010
+++ rtems/cpukit/score/cpu/lm32/ChangeLog Fri Feb 11 02:57:36 2011
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * cpu.c, irq.c, rtems/score/lm32.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2010-10-21 Joel Sherrill <joel.sherrill at oarcorp.com>
* rtems/score/cpu.h: Add RTEMS_COMPILER_NO_RETURN_ATTRIBUTE to
diff -u rtems/cpukit/score/cpu/lm32/cpu.c:1.7 rtems/cpukit/score/cpu/lm32/cpu.c:1.8
--- rtems/cpukit/score/cpu/lm32/cpu.c:1.7 Sat Mar 27 10:01:51 2010
+++ rtems/cpukit/score/cpu/lm32/cpu.c Fri Feb 11 02:57:36 2011
@@ -169,6 +169,6 @@
/* The LM32 softcore itself hasn't any HLT instruction. But the
* LM32 qemu target interprets this nop instruction as HLT.
*/
- asm volatile("and r0, r0, r0");
+ __asm__ volatile("and r0, r0, r0");
}
}
diff -u rtems/cpukit/score/cpu/lm32/irq.c:1.6 rtems/cpukit/score/cpu/lm32/irq.c:1.7
--- rtems/cpukit/score/cpu/lm32/irq.c:1.6 Fri Jul 30 13:52:06 2010
+++ rtems/cpukit/score/cpu/lm32/irq.c Fri Feb 11 02:57:36 2011
@@ -35,7 +35,7 @@
void *_exception_stack_frame;
-register unsigned long *stack_ptr asm("sp");
+register unsigned long *stack_ptr __asm__ ("sp");
void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
{
diff -u rtems/cpukit/score/cpu/lm32/rtems/score/lm32.h:1.3 rtems/cpukit/score/cpu/lm32/rtems/score/lm32.h:1.4
--- rtems/cpukit/score/cpu/lm32/rtems/score/lm32.h:1.3 Fri Aug 20 16:24:16 2010
+++ rtems/cpukit/score/cpu/lm32/rtems/score/lm32.h Fri Feb 11 02:57:36 2011
@@ -69,43 +69,43 @@
#endif
#define lm32_read_interrupts( _ip) \
- asm volatile ("rcsr %0, ip":"=r"(_ip));
+ __asm__ volatile ("rcsr %0, ip":"=r"(_ip));
#define lm32_disable_interrupts( _level ) \
do { register uint32_t ie; \
- asm volatile ("rcsr %0,ie":"=r"(ie)); \
+ __asm__ volatile ("rcsr %0,ie":"=r"(ie)); \
_level = ie; \
ie &= (~0x0001); \
- asm volatile ("wcsr ie,%0"::"r"(ie)); \
+ __asm__ volatile ("wcsr ie,%0"::"r"(ie)); \
} while (0)
#define lm32_enable_interrupts( _level ) \
- asm volatile ("wcsr ie,%0"::"r"(_level));
+ __asm__ volatile ("wcsr ie,%0"::"r"(_level));
#define lm32_flash_interrupts( _level ) \
do { register uint32_t ie; \
- asm volatile ("wcsr ie,%0"::"r"(_level)); \
+ __asm__ volatile ("wcsr ie,%0"::"r"(_level)); \
ie = _level & (~0x0001); \
- asm volatile ("wcsr ie,%0"::"r"(ie)); \
+ __asm__ volatile ("wcsr ie,%0"::"r"(ie)); \
} while (0)
#define lm32_interrupt_unmask( _mask ) \
do { register uint32_t im; \
- asm volatile ("rcsr %0,im":"=r"(im)); \
+ __asm__ volatile ("rcsr %0,im":"=r"(im)); \
im |= _mask; \
- asm volatile ("wcsr im,%0"::"r"(im)); \
+ __asm__ volatile ("wcsr im,%0"::"r"(im)); \
} while (0)
#define lm32_interrupt_mask( _mask ) \
do { register uint32_t im; \
- asm volatile ("rcsr %0,im":"=r"(im)); \
+ __asm__ volatile ("rcsr %0,im":"=r"(im)); \
im &= ~_mask; \
- asm volatile ("wcsr im,%0"::"r"(im)); \
+ __asm__ volatile ("wcsr im,%0"::"r"(im)); \
} while (0)
#define lm32_interrupt_ack( _mask ) \
do { register uint32_t ip = _mask; \
- asm volatile ("wcsr ip,%0"::"r"(ip)); \
+ __asm__ volatile ("wcsr ip,%0"::"r"(ip)); \
} while (0)
#endif /* _RTEMS_SCORE_LM32_H */
*ralf*:
2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* cpu.c, rtems/score/cpu.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
M 1.128 cpukit/score/cpu/arm/ChangeLog
M 1.32 cpukit/score/cpu/arm/cpu.c
M 1.47 cpukit/score/cpu/arm/rtems/score/cpu.h
diff -u rtems/cpukit/score/cpu/arm/ChangeLog:1.127 rtems/cpukit/score/cpu/arm/ChangeLog:1.128
--- rtems/cpukit/score/cpu/arm/ChangeLog:1.127 Tue Nov 23 09:59:18 2010
+++ rtems/cpukit/score/cpu/arm/ChangeLog Fri Feb 11 03:08:14 2011
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * cpu.c, rtems/score/cpu.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2010-11-23 Gedare Bloom <giddyup44 at yahoo.com>
PR 1719/cpukit
diff -u rtems/cpukit/score/cpu/arm/cpu.c:1.31 rtems/cpukit/score/cpu/arm/cpu.c:1.32
--- rtems/cpukit/score/cpu/arm/cpu.c:1.31 Thu Apr 8 05:13:46 2010
+++ rtems/cpukit/score/cpu/arm/cpu.c Fri Feb 11 03:08:14 2011
@@ -64,7 +64,7 @@
{
uint32_t arm_switch_reg;
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[arm_switch_reg], cpsr\n"
"bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n"
@@ -81,7 +81,7 @@
ARM_SWITCH_REGISTERS;
uint32_t level;
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[level], cpsr\n"
"and %[level], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n"
diff -u rtems/cpukit/score/cpu/arm/rtems/score/cpu.h:1.46 rtems/cpukit/score/cpu/arm/rtems/score/cpu.h:1.47
--- rtems/cpukit/score/cpu/arm/rtems/score/cpu.h:1.46 Mon Nov 22 07:06:46 2010
+++ rtems/cpukit/score/cpu/arm/rtems/score/cpu.h Fri Feb 11 03:08:14 2011
@@ -242,7 +242,7 @@
uint32_t arm_switch_reg;
uint32_t level;
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[level], cpsr\n"
"orr %[arm_switch_reg], %[level], #0x80\n"
@@ -258,7 +258,7 @@
{
ARM_SWITCH_REGISTERS;
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"msr cpsr, %[level]\n"
ARM_SWITCH_BACK
@@ -271,7 +271,7 @@
{
uint32_t arm_switch_reg;
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[arm_switch_reg], cpsr\n"
"msr cpsr, %[level]\n"
@@ -325,7 +325,7 @@
uint32_t _level; \
uint32_t _error = _err; \
_CPU_ISR_Disable( _level ); \
- asm volatile ("mov r0, %0\n" \
+ __asm__ volatile ("mov r0, %0\n" \
: "=r" (_error) \
: "0" (_error) \
: "r0" ); \
@@ -367,7 +367,7 @@
return swapped;
#else
uint32_t tmp = value; /* make compiler warnings go away */
- asm volatile ("EOR %1, %0, %0, ROR #16\n"
+ __asm__ volatile ("EOR %1, %0, %0, ROR #16\n"
"BIC %1, %1, #0xff0000\n"
"MOV %0, %0, ROR #8\n"
"EOR %0, %0, %1, LSR #8\n"
@@ -431,7 +431,7 @@
RTEMS_COMPILER_MEMORY_BARRIER();
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[psr], cpsr\n"
"bic %[arm_switch_reg], %[psr], #0x80\n"
@@ -447,7 +447,7 @@
{
ARM_SWITCH_REGISTERS;
- asm volatile (
+ __asm__ volatile (
ARM_SWITCH_TO_ARM
"msr cpsr, %[psr]\n"
ARM_SWITCH_BACK
*ralf*:
2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
* cpu.c, avr/interrupt.h, avr/power.h, rtems/score/cpu.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
M 1.55 cpukit/score/cpu/avr/ChangeLog
M 1.4 cpukit/score/cpu/avr/avr/interrupt.h
M 1.4 cpukit/score/cpu/avr/avr/power.h
M 1.17 cpukit/score/cpu/avr/cpu.c
M 1.32 cpukit/score/cpu/avr/rtems/score/cpu.h
diff -u rtems/cpukit/score/cpu/avr/ChangeLog:1.54 rtems/cpukit/score/cpu/avr/ChangeLog:1.55
--- rtems/cpukit/score/cpu/avr/ChangeLog:1.54 Sat Nov 6 17:32:06 2010
+++ rtems/cpukit/score/cpu/avr/ChangeLog Fri Feb 11 03:09:21 2011
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * cpu.c, avr/interrupt.h, avr/power.h, rtems/score/cpu.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2010-11-06 Joel Sherrill <joel.sherrilL at OARcorp.com>
PR 1715/cpukit
diff -u rtems/cpukit/score/cpu/avr/avr/interrupt.h:1.3 rtems/cpukit/score/cpu/avr/avr/interrupt.h:1.4
--- rtems/cpukit/score/cpu/avr/avr/interrupt.h:1.3 Mon May 10 11:31:20 2010
+++ rtems/cpukit/score/cpu/avr/avr/interrupt.h Fri Feb 11 03:09:21 2011
@@ -218,21 +218,21 @@
# if defined(__AVR_MEGA__) && __AVR_MEGA__
# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
- void vector (void) { asm volatile ("jmp " __STRINGIFY(tgt) ::); }
+ void vector (void) { __asm__ volatile ("jmp " __STRINGIFY(tgt) ::); }
# else /* !__AVR_MEGA */
# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
- void vector (void) { asm volatile ("rjmp " __STRINGIFY(tgt) ::); }
+ void vector (void) { __asm__ volatile ("rjmp " __STRINGIFY(tgt) ::); }
# endif /* __AVR_MEGA__ */
#else /* !__cplusplus */
# if defined(__AVR_MEGA__) && __AVR_MEGA__
# define ISR_ALIAS(vector, tgt) void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
- void vector (void) { asm volatile ("jmp " __STRINGIFY(tgt) ::); }
+ void vector (void) { __asm__ volatile ("jmp " __STRINGIFY(tgt) ::); }
# else /* !__AVR_MEGA */
# define ISR_ALIAS(vector, tgt) void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
- void vector (void) { asm volatile ("rjmp " __STRINGIFY(tgt) ::); }
+ void vector (void) { __asm__ volatile ("rjmp " __STRINGIFY(tgt) ::); }
# endif /* __AVR_MEGA__ */
#endif /* __cplusplus */
diff -u rtems/cpukit/score/cpu/avr/avr/power.h:1.3 rtems/cpukit/score/cpu/avr/avr/power.h:1.4
--- rtems/cpukit/score/cpu/avr/avr/power.h:1.3 Mon May 10 11:31:24 2010
+++ rtems/cpukit/score/cpu/avr/avr/power.h Fri Feb 11 03:09:21 2011
@@ -1377,7 +1377,7 @@
} clock_div_t;
-static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
+static inline void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
/** \addtogroup avr_power
\code clock_prescale_set(x) \endcode
diff -u rtems/cpukit/score/cpu/avr/cpu.c:1.16 rtems/cpukit/score/cpu/avr/cpu.c:1.17
--- rtems/cpukit/score/cpu/avr/cpu.c:1.16 Sat Mar 27 10:01:24 2010
+++ rtems/cpukit/score/cpu/avr/cpu.c Fri Feb 11 03:09:21 2011
@@ -166,7 +166,7 @@
void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
- for( ; ; ) asm volatile ("sleep"::);
+ for( ; ; ) __asm__ volatile ("sleep"::);
/* insert your "halt" instruction here */ ;
return (void *) 0;
}
diff -u rtems/cpukit/score/cpu/avr/rtems/score/cpu.h:1.31 rtems/cpukit/score/cpu/avr/rtems/score/cpu.h:1.32
--- rtems/cpukit/score/cpu/avr/rtems/score/cpu.h:1.31 Sat Nov 6 17:32:06 2010
+++ rtems/cpukit/score/cpu/avr/rtems/score/cpu.h Fri Feb 11 03:09:21 2011
@@ -425,7 +425,7 @@
typedef struct {
uint16_t stack_pointer;
- uint8_t status; //SREG
+ uint8_t status; /* SREG */
} Context_Control;
#define _CPU_Context_Get_SP( _context ) \
@@ -623,7 +623,7 @@
#define _CPU_ISR_Disable( _isr_cookie ) \
do { \
(_isr_cookie) = SREG; \
- asm volatile ("cli"::); \
+ __asm__ volatile ("cli"::); \
} while (0)
/*
@@ -639,7 +639,7 @@
#define _CPU_ISR_Enable( _isr_cookie ) \
do { \
SREG = _isr_cookie; \
- asm volatile ("sei"::); \
+ __asm__ volatile ("sei"::); \
} while (0)
/*
@@ -656,9 +656,9 @@
#define _CPU_ISR_Flash( _isr_cookie ) \
do { \
SREG=(_isr_cookie); \
- asm volatile("sei"::); \
+ __asm__ volatile("sei"::); \
(_isr_cookie) = SREG; \
- asm volatile("cli"::); \
+ __asm__ volatile("cli"::); \
} while (0)
/*
@@ -924,7 +924,7 @@
/* functions */
-/*context_initialize asm function*/
+/*context_initialize asm-function*/
void context_initialize(unsigned short* context,
unsigned short stack_add,
--
Generated by Deluxe Loginfo [http://www.codewiz.org/projects/index.html#loginfo] 2.122 by Bernardo Innocenti <bernie at develer.com>
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