change log for rtems (2011-10-07)
rtems-vc at rtems.org
rtems-vc at rtems.org
Fri Oct 7 15:11:25 UTC 2011
*joel*:
2011-10-07 Daniel Hellstrom <daniel at gaisler.com>
PR 1931/cpukit
* score/src/percpu.c: The stack must be aligned to CPU alignment
requirement.
M 1.2940 cpukit/ChangeLog
M 1.7 cpukit/score/src/percpu.c
diff -u rtems/cpukit/ChangeLog:1.2939 rtems/cpukit/ChangeLog:1.2940
--- rtems/cpukit/ChangeLog:1.2939 Fri Oct 7 06:06:20 2011
+++ rtems/cpukit/ChangeLog Fri Oct 7 09:29:18 2011
@@ -1,3 +1,9 @@
+2011-10-07 Daniel Hellstrom <daniel at gaisler.com>
+
+ PR 1931/cpukit
+ * score/src/percpu.c: The stack must be aligned to CPU alignment
+ requirement.
+
2011-10-07 Ralf Corsépius <ralf.corsepius at rtems.org>
* score/src/threadhandler.c: Don't undefine __USE_INIT_FINI__ for
diff -u rtems/cpukit/score/src/percpu.c:1.6 rtems/cpukit/score/src/percpu.c:1.7
--- rtems/cpukit/score/src/percpu.c:1.6 Wed May 11 09:22:35 2011
+++ rtems/cpukit/score/src/percpu.c Fri Oct 7 09:29:19 2011
@@ -50,7 +50,7 @@
p->interrupt_stack_low = _Workspace_Allocate_or_fatal_error( size );
ptr = (uintptr_t) _Addresses_Add_offset( p->interrupt_stack_low, size );
- ptr &= ~CPU_STACK_ALIGNMENT;
+ ptr &= ~(CPU_STACK_ALIGNMENT - 1);
p->interrupt_stack_high = (void *)ptr;
p->state = RTEMS_BSP_SMP_CPU_INITIAL_STATE;
RTEMS_COMPILER_MEMORY_BARRIER();
*joel*:
2011-10-07 Daniel Hellstrom <daniel at gaisler.com>
PR 1932/cpukit
* cpu_asm.S: At some point the interrupt trap handler causes a
window-overflow and the window overflow trap handler crashes when
writing to 0. I found that this is because the WIM was bad, to the
window overflow handler uses a uninitialized stack pointer in a
window never used.
* g3=CWP, not WIM
* CWP is incremented by done_flushing no need doing that here also
* I see no reason to create an additional stack frame (save)
* Must turn off traps when updating WIM (maybe already done by caller?)
M 1.107 cpukit/score/cpu/sparc/ChangeLog
M 1.20 cpukit/score/cpu/sparc/cpu_asm.S
diff -u rtems/cpukit/score/cpu/sparc/ChangeLog:1.106 rtems/cpukit/score/cpu/sparc/ChangeLog:1.107
--- rtems/cpukit/score/cpu/sparc/ChangeLog:1.106 Tue Sep 27 04:17:55 2011
+++ rtems/cpukit/score/cpu/sparc/ChangeLog Fri Oct 7 09:31:44 2011
@@ -1,3 +1,15 @@
+2011-10-07 Daniel Hellstrom <daniel at gaisler.com>
+
+ PR 1932/cpukit
+ * cpu_asm.S: At some point the interrupt trap handler causes a
+ window-overflow and the window overflow trap handler crashes when
+ writing to 0. I found that this is because the WIM was bad, to the
+ window overflow handler uses a uninitialized stack pointer in a
+ window never used.
+ * g3=CWP, not WIM
+ * CWP is incremented by done_flushing no need doing that here also
+ * I see no reason to create an additional stack frame (save)
+ * Must turn off traps when updating WIM (maybe already done by caller?)
2011-09-27 Sebastian Huber <sebastian.huber at embedded-brains.de>
PR 1914/cpukit
diff -u rtems/cpukit/score/cpu/sparc/cpu_asm.S:1.19 rtems/cpukit/score/cpu/sparc/cpu_asm.S:1.20
--- rtems/cpukit/score/cpu/sparc/cpu_asm.S:1.19 Wed Mar 16 15:05:05 2011
+++ rtems/cpukit/score/cpu/sparc/cpu_asm.S Fri Oct 7 09:31:44 2011
@@ -336,22 +336,22 @@
*
* This routine is only used to switch to the first task on a
* secondary core in an SMP configuration. We do not need to
- * flush all the windows and, in fact, this can be dangerous
+ * flush any windows and, in fact, this can be dangerous
* as they may or may not be initialized properly. So we just
* reinitialize the PSR and WIM.
*/
PUBLIC(_CPU_Context_switch_to_first_task_smp)
SYM(_CPU_Context_switch_to_first_task_smp):
- save %sp, -CPU_MINIMUM_STACK_FRAME_SIZE, %sp
-
- mov %psr, %g1 ! Initialize WIM
- add %g1, 1, %g2
- and %g2, 0x7, %g2
- set 1, %g3
- sll %g3, %g2, %g3
- mov %g3, %wim
- ba done_flushing
- mov %i0, %o1 ! in the delay slot
+ mov %psr, %g1 ! Turn of traps when modifying WIM
+ andn %g1, SPARC_PSR_ET_MASK, %g1
+ mov %g1, %psr
+ /* WIM and PSR will be set in done_flushing, it need args:
+ * g1=PSR, g3=CWP, o1=Context
+ */
+ and %g1, SPARC_NUMBER_OF_REGISTER_WINDOWS - 1, %g3
+ nop
+ mov %o0, %o1 ! in the delay slot
+ ba,a done_flushing
#endif
/* end of file */
*joel*:
2011-10-07 Daniel Hellstrom <daniel at gaisler.com>
PR 1933/cpukit
* shared/irq_asm.S: From code inspection I have found the following
issues (most SMP), and some improvements in irq_asm.S. I would need a
long test with interrupts to verify the interrupt handler better,
however I can not see that these patches hurt. Please see comment per
hunk below, One should go through the file to indent delay-slots
correctly, I have fixed some in the patch areas. An extra space is
added in front of delay slots to indicate a delay slot.
M 1.89 c/src/lib/libbsp/sparc/ChangeLog
M 1.3 c/src/lib/libbsp/sparc/shared/irq_asm.S
diff -u rtems/c/src/lib/libbsp/sparc/ChangeLog:1.88 rtems/c/src/lib/libbsp/sparc/ChangeLog:1.89
--- rtems/c/src/lib/libbsp/sparc/ChangeLog:1.88 Thu Jul 28 12:33:07 2011
+++ rtems/c/src/lib/libbsp/sparc/ChangeLog Fri Oct 7 09:35:03 2011
@@ -1,3 +1,14 @@
+2011-10-07 Daniel Hellstrom <daniel at gaisler.com>
+
+ PR 1933/cpukit
+ * shared/irq_asm.S: From code inspection I have found the following
+ issues (most SMP), and some improvements in irq_asm.S. I would need a
+ long test with interrupts to verify the interrupt handler better,
+ however I can not see that these patches hurt. Please see comment per
+ hunk below, One should go through the file to indent delay-slots
+ correctly, I have fixed some in the patch areas. An extra space is
+ added in front of delay slots to indicate a delay slot.
+
2011-07-28 Jennifer Averett <Jennifer.Averett at OARcorp.com>
PR 1801
diff -u rtems/c/src/lib/libbsp/sparc/shared/irq_asm.S:1.2 rtems/c/src/lib/libbsp/sparc/shared/irq_asm.S:1.3
--- rtems/c/src/lib/libbsp/sparc/shared/irq_asm.S:1.2 Thu Jul 28 12:33:07 2011
+++ rtems/c/src/lib/libbsp/sparc/shared/irq_asm.S Fri Oct 7 09:35:03 2011
@@ -267,8 +267,6 @@
add %l5, %l7, %l5
#endif
ld [%l5], %l5 /* l5 = pointer to per CPU */
- nop
- nop
/*
* On multi-core system, we need to use SMP safe versions
@@ -277,9 +275,8 @@
* _ISR_SMP_Enter returns the interrupt nest level. If we are
* outermost interrupt, then we need to switch stacks.
*/
- mov %sp, %fp
call SYM(_ISR_SMP_Enter), 0
- nop ! delay slot
+ mov %sp, %fp ! delay slot
cmp %o0, 0
#else
/*
@@ -321,8 +318,8 @@
/*
* Do we need to switch to the interrupt stack?
*/
- bnz dont_switch_stacks ! No, then do not switch stacks
- ld [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
+ beq,a dont_switch_stacks ! No, then do not switch stacks
+ ld [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
dont_switch_stacks:
/*
@@ -358,6 +355,7 @@
nop ! delay slot
cmp %o0, 0
bz simple_return
+ nop
#else
!sethi %hi(SYM(_Thread_Dispatch_disable_level)), %l4
!ld [%l5 + PER_CPU_ISR_NEST_LEVEL], %l7
@@ -405,7 +403,7 @@
ld [%l6 + %lo(SYM(_CPU_ISR_Dispatch_disable))], %l7
orcc %l7, %g0, %g0 ! Is this thread already doing an ISR?
bnz simple_return ! Yes, then do a "simple" exit
- nop
+ nop
/*
* If a context switch is necessary, then do fudge stack to
@@ -413,11 +411,9 @@
*/
ldub [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
- nop
- nop
-
orcc %l5, %g0, %g0 ! Is thread switch necessary?
bz simple_return ! No, then return
+ nop
#endif
/*
* Invoke interrupt dispatcher.
@@ -479,16 +475,11 @@
nop
#endif
ld [%l5], %l5 /* l5 = pointer to per CPU */
- nop
- nop
#else
sethi %hi(_Per_CPU_Information), %l5
add %l5, %lo(_Per_CPU_Information), %l5
#endif
ldub [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
- nop
- nop
-
orcc %l5, %g0, %g0 ! Is thread switch necessary?
bz allow_nest_again
nop
*ralf*:
2011-10-07 Ralf Corsépius <ralf.corsepius at rtems.org>
* shared/console/console.c: Remove stray local decl of "close".
M 1.269 c/src/lib/libbsp/powerpc/ChangeLog
M 1.21 c/src/lib/libbsp/powerpc/shared/console/console.c
diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.268 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.269
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.268 Wed Aug 31 10:54:18 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Fri Oct 7 09:25:31 2011
@@ -1,3 +1,7 @@
+2011-10-07 Ralf Corsépius <ralf.corsepius at rtems.org>
+
+ * shared/console/console.c: Remove stray local decl of "close".
+
2011-08-31 Sebastian Huber <sebastian.huber at embedded-brains.de>
* shared/startup/linkcmds.base: New file.
diff -u rtems/c/src/lib/libbsp/powerpc/shared/console/console.c:1.20 rtems/c/src/lib/libbsp/powerpc/shared/console/console.c:1.21
--- rtems/c/src/lib/libbsp/powerpc/shared/console/console.c:1.20 Fri Jan 28 14:29:52 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/console/console.c Fri Oct 7 09:25:31 2011
@@ -26,8 +26,6 @@
#include <assert.h>
#include <stdlib.h>
-extern int close(int fd);
-
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
*ralf*:
2011-10-07 Ralf Corsépius <ralf.corsepius at rtems.org>
* shared/startup/bspstart.c: Comment out unused vars.
M 1.270 c/src/lib/libbsp/powerpc/ChangeLog
M 1.58 c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.269 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.270
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.269 Fri Oct 7 09:25:31 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Fri Oct 7 09:29:38 2011
@@ -1,5 +1,6 @@
2011-10-07 Ralf Corsépius <ralf.corsepius at rtems.org>
+ * shared/startup/bspstart.c: Comment out unused vars.
* shared/console/console.c: Remove stray local decl of "close".
2011-08-31 Sebastian Huber <sebastian.huber at embedded-brains.de>
diff -u rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c:1.57 rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c:1.58
--- rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c:1.57 Mon Jul 18 11:35:08 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c Fri Oct 7 09:29:38 2011
@@ -143,8 +143,8 @@
#endif
uintptr_t intrStackStart;
uintptr_t intrStackSize;
- ppc_cpu_id_t myCpu;
- ppc_cpu_revision_t myCpuRevision;
+/* ppc_cpu_id_t myCpu; */
+/* ppc_cpu_revision_t myCpuRevision; */
prep_t boardManufacturer;
motorolaBoard myBoard;
Triv121PgTbl pt=0;
@@ -154,8 +154,8 @@
* function store the result in global variables so that it can be used
* later...
*/
- myCpu = get_ppc_cpu_type();
- myCpuRevision = get_ppc_cpu_revision();
+ /* myCpu = */ get_ppc_cpu_type();
+ /* myCpuRevision = */ get_ppc_cpu_revision();
/*
* Init MMU block address translation to enable hardware access
--
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