[rtems commit] bsp/gen83xx: Fix RCWLR_CEVCO defines

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    a640b204c066d999a8e88a3370f8b254ee813398
Changeset: http://git.rtems.org/rtems/commit/?id=a640b204c066d999a8e88a3370f8b254ee813398

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Fri Dec 21 09:26:27 2012 +0100

bsp/gen83xx: Fix RCWLR_CEVCO defines

---

 c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
index 5921425..a120fa0 100644
--- a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
@@ -921,8 +921,9 @@ extern m83xxRegisters_t mpc83xx;
 #define RCWLR_COREPLL(n) (((n)&0xff)<<(31-15))
 
 /* for MPC8309: */
-#define RCWLR_CEVCOD_1_4 (0<<(31-25))     /* QUICC internal PLL divider 1:4 */
-#define RCWLR_CEVCOD_1_2 (2<<(31-25))     /* QUICC internal PLL divider 1:2 */
+#define RCWLR_CEVCOD_1_8 (2<<(31-25))     /* QUICC internal PLL divider 1:8 */
+#define RCWLR_CEVCOD_1_4 (1<<(31-25))     /* QUICC internal PLL divider 1:4 */
+#define RCWLR_CEVCOD_1_2 (0<<(31-25))     /* QUICC internal PLL divider 1:2 */
                                           /* QUICC Engine PLL mult. factor */
 #define RCWLR_CEPDF_2     (1<<(31-26))    /* QUICC Engine divide PLL out by 2*/
                                           /* QUICC Engine PLL mult. factor */