[rtems commit] bsps: Add GICv3 arm_gic_irq_processor_count()
Sebastian Huber
sebh at rtems.org
Thu Dec 17 14:32:42 UTC 2020
Module: rtems
Branch: master
Commit: 747fb65c6e5921c39c324c6e86ab2f2d87b47ee0
Changeset: http://git.rtems.org/rtems/commit/?id=747fb65c6e5921c39c324c6e86ab2f2d87b47ee0
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Thu Dec 10 09:09:10 2020 +0100
bsps: Add GICv3 arm_gic_irq_processor_count()
Update #4202.
---
bsps/include/dev/irq/arm-gic-irq.h | 7 +------
bsps/shared/dev/irq/arm-gicv2.c | 7 +++++++
bsps/shared/dev/irq/arm-gicv3.c | 27 +++++++++++++++++++++++++++
3 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index 34bf343..d4b197b 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -116,12 +116,7 @@ void arm_interrupt_handler_dispatch(rtems_vector_number vector);
*/
void gicvx_interrupt_dispatch(void);
-static inline uint32_t arm_gic_irq_processor_count(void)
-{
- volatile gic_dist *dist = ARM_GIC_DIST;
-
- return GIC_DIST_ICDICTR_CPU_NUMBER_GET(dist->icdictr) + 1;
-}
+uint32_t arm_gic_irq_processor_count(void);
void arm_gic_irq_initialize_secondary_cpu(void);
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c
index bd614bc..97f397d 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -269,3 +269,10 @@ void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
#endif
| GIC_DIST_ICDSGIR_SGIINTID(vector);
}
+
+uint32_t arm_gic_irq_processor_count(void)
+{
+ volatile gic_dist *dist = ARM_GIC_DIST;
+
+ return GIC_DIST_ICDICTR_CPU_NUMBER_GET(dist->icdictr) + 1;
+}
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index 536abdf..e23778e 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -354,3 +354,30 @@ void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
#endif
WRITE64_SR(ICC_SGI1, value);
}
+
+uint32_t arm_gic_irq_processor_count(void)
+{
+ volatile gic_dist *dist = ARM_GIC_DIST;
+ uint32_t cpu_count;
+
+ if ((dist->icddcr & GIC_DIST_ICDDCR_ARE_S) == 0) {
+ cpu_count = GIC_DIST_ICDICTR_CPU_NUMBER_GET(dist->icdictr) + 1;
+ } else {
+ int i;
+
+ /* Assume that an interrupt export port exists */
+ cpu_count = 0;
+
+ for (i = 0; i < CPU_MAXIMUM_PROCESSORS; ++i) {
+ volatile gic_redist *redist = gicv3_get_redist(i);
+
+ if ((redist->icrtyper & GIC_REDIST_ICRTYPER_LAST) != 0) {
+ break;
+ }
+
+ ++cpu_count;
+ }
+ }
+
+ return cpu_count;
+}
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