Integration | Choosing an RBSP. (#12)

Joel Sherrill (@joel) gitlab at rtems.org
Thu Sep 12 16:21:59 UTC 2024




Joel Sherrill commented on a discussion: https://gitlab.rtems.org/administration/integration/-/issues/12#note_111979


The RBSP on a simulator must be fast, unlikely to hang, and predictable. 

sis is fast and cycle accurate simulator. We already build it. It supports SMP. It runs various SPARC BSPs and also supports RISC-V. It has an option to limit the amount of simulated time and this is easy to avoid hanging runs. 

@chris pointed out some of the Qemu issues. It is slower and more fragile as to which fork/version you need for a specific BSP. It is not cycle accurate. Internally, we have seen it hang in GitLab CI jobs and need to be manually killed. It didn't stop the CI run but left qemu running. On the positive side, it often supports networking but that is likely a reach too far for the initial CI. We do not have any automation for network tests.

Gaisler has free to download bitstreams for various LEONs and NOEL-V at https://www.gaisler.com/ on the right hand side. Look for "LEON and NOEL FPGA Evaluation Designs". SIS also simulates the NOEL-V. Also, we can have both on real hardware. I admit to not knowing the price of all the FPGA boards they list but the Arty-A7 for NOEL-V is pretty cheap as I recall.

I would lean strongly to sis/leon3 as the RBSP #1. For RBSP #2, #3, and #4, it is up for discussion. But IMO, the best options are:

- riscv/noelv on sis. Same value proposition as sparc/leon3 on sis
- arm/xilinx_zynq_a9_qemu on qemu. Other variants of the same BSP run on affordable reference boards.
- aarch64/xilinx_zynqmp_lp64_qemu on qemu. Again variants of the same BSP work on affordable board.

All of these should already be supported by rtems tester.

-- 
View it on GitLab: https://gitlab.rtems.org/administration/integration/-/issues/12#note_111979
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