RTEMS | riscv: s-mode use SBI for timer, reset, and SMP support (!1108)

[Kinsey Moore (@opticron)]

Kinsey Moore pushed new commits to merge request !1108
Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108

* f2a3dd2b - 1 commit from branch `main`

* 018ff117 - riscv/riscv: support using SBI timer in s-mode
* f67665e3 - riscv/riscv: use shutdown SBI in s-mode
* 020d5177 - riscv/riscv: s-mode booting with SMP
* 40e4c8c2 - riscv/riscv: remove RISCV_FATAL_CLOCK_SMP_INIT

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108
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