RTEMS | riscv: s-mode use SBI for timer, reset, and SMP support (!1108)
Gedare Bloom (@gedare)
gitlab at rtems.org
Thu Mar 12 23:03:19 UTC 2026
Gedare Bloom pushed new commits to merge request !1108
Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108
* a1551f17...3f7b1153 - 2 commits from branch `main`
* 9aaf9078 - riscv/riscv: support using SBI timer in s-mode
* 34633875 - riscv/riscv: use shutdown SBI in s-mode
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View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108
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