GSoC 2014 | Poring RTEMS for OpenRISC

[Hesham Moustafa]

On Mon, Mar 3, 2014 at 5:06 PM, Joel Sherrill <Joel.Sherrill at oarcorp.com>wrote:

>
> On Mar 3, 2014 8:23 AM, Gedare Bloom <gedare at rtems.org> wrote:
> >
> > Hesham,
> >
> > The first question to figure out is why was the older port dropped.
>
> This I can answer. The tool chain rotted and had no maintainer. I also
> recall not having a simulator to test on.
>
> The final issue was some discrepancy between multiple openrisc CPU
> projects where I thought the focus on the architecture we had a port to was
> losing interest from them.
>
Thanks Dr Joel, I also wanted to know the answer :)
Was this architecture OpenRISC 1000 or another core ?

> > The second is what is your interest in porting to OpenRISC?
>
Because I have been working on the last few months on FPGA project ( mips
microprocessor).
I wanted to port an OS to an opensource processor, and OpenRISC
architecture
is mature enough to port a complex RTOS like RTEMS.

> And who would use it?
>
People using black box OpenRISC and others interested in Digital design,
Computer architecture and
HW/SW interfacing. Something like xilinx zynq ? except that both OpenRISC
and RTEMS are opensource.

>  Long term a port needs to be to a viable architecture from a "is it
> alive" view  this includes the cpu, tools, a way for us to test, etc
>
Sure, that's what I hope to work on.

> > Gedare
> >
> > On Sun, Mar 2, 2014 at 12:39 AM, Hesham Moustafa
> > <heshamelmatary at gmail.com> wrote:
> > > Hi,
> > >
> > > I am thinking of porting RTEMS for OpenRISC as a proposal for GSoC
> project
> > > this year.
> > > I know there was an older port, but it's not available anymore on the
> > > current RTEMS mainsteam.
> > > Would this project be of useful to RTEMS and suitable for GSoC ?
> > >
> > > Thanks,
> > > Hesham
> > >
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> > >
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>
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