[PATCH 05/12] bsp/altera-cyclone-v: Enable L2 cache for network driver

Ralf Kirchner ralf.kirchner at embedded-brains.de
Tue May 27 14:45:58 UTC 2014


---
 c/src/lib/libbsp/arm/altera-cyclone-v/network/network.c |   15 ++++++++++++++-
 1 Datei geändert, 14 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)

diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/network/network.c b/c/src/lib/libbsp/arm/altera-cyclone-v/network/network.c
index d2f669a..d591e4e 100644
--- a/c/src/lib/libbsp/arm/altera-cyclone-v/network/network.c
+++ b/c/src/lib/libbsp/arm/altera-cyclone-v/network/network.c
@@ -40,6 +40,7 @@
 #include <bsp/alt_generalpurpose_io.h>
 #include <bsp/nocache-heap.h>
 #include "socal/alt_rstmgr.h"
+#include "socal/alt_sysmgr.h"
 #include "socal/hps.h"
 #include "socal/socal.h"
 #include <libchip/dwmac.h>
@@ -1082,7 +1083,19 @@ static int network_if_bus_setup( void *arg )
 {
   (void) arg;
 
-  /* Nothing to be done */
+  uint32_t reg = *((uint32_t*)ALT_SYSMGR_EMAC_L3MST_ADDR);
+
+  reg &= ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_CLR_MSK;
+  reg &= ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_CLR_MSK;
+  reg |= ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_SET(
+    ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_ALLOC
+  );
+  reg |= ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_SET(
+    ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_ALLOC
+  );
+
+  alt_write_word( ALT_SYSMGR_EMAC_L3MST_ADDR, reg );
+
   return 0;
 }
 
-- 
1.7.10.4




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