[PATCH 04/12] bsp/arm: Broadcast cache maintenances
Sebastian Huber
sebastian.huber at embedded-brains.de
Tue May 27 15:30:48 UTC 2014
On 2014-05-27 16:45, Ralf Kirchner wrote:
> ---
> c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h | 2 +-
> 1 Datei geändert, 1 Zeile hinzugefügt(+), 1 Zeile entfernt(-)
>
> diff --git a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h
> index 578c842..97977ba 100644
> --- a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h
> +++ b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h
> @@ -108,7 +108,7 @@ BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_0(void)
> /* Enable cache coherency support for this processor */
> {
> uint32_t actlr = arm_cp15_get_auxiliary_control();
> - actlr |= ARM_CORTEX_A9_ACTL_SMP;
> + actlr |= ARM_CORTEX_A9_ACTL_SMP | ARM_CORTEX_A9_ACTL_FW;
> arm_cp15_set_auxiliary_control(actlr);
> }
> #endif
>
Is the problem with the bus errors in the network driver solved? Otherwise we
must not apply this patch series.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.huber at embedded-brains.de
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