index 657b2f4..e69de29 100644

Joel Sherrill joel at rtems.org
Wed Dec 23 00:20:42 UTC 2015


Please explain what the purpose of this change is. You may also want to
read the RTEMS wiki instructions on submitting a patch. I think you just
did a git diff and didn't use the format-patch feature
On Dec 22, 2015 6:17 PM, "Zaphod Beeblebrox" <liamgreenlee at gmail.com> wrote:

> -#ifndef _BSPABORT_H
> -#define _BSPABORT_H
> -
> -#include <rtems/system.h>
> -#include <rtems.h>
> -#include <rtems/bspIo.h>
> -
> -#define INSN_MASK         0xc5
> -
> -#define INSN_STM1         0x80
> -#define INSN_STM2         0x84
> -#define INSN_STR          0x40
> -#define INSN_STRB         0x44
> -
> -#define INSN_LDM1         0x81
> -#define INSN_LDM23        0x85
> -#define INSN_LDR          0x41
> -#define INSN_LDRB         0x45
> -
> -#define GET_RD(x)         ((x & 0x0000f000) >> 12)
> -#define GET_RN(x)         ((x & 0x000f0000) >> 16)
> -
> -#define GET_U(x)          ((x & 0x00800000) >> 23)
> -#define GET_I(x)          ((x & 0x02000000) >> 25)
> -
> -#define GET_REG(r, ctx)      (((uint32_t   *)ctx)[r])
> -#define SET_REG(r, ctx, v)   (((uint32_t   *)ctx)[r] = v)
> -#define GET_OFFSET(insn)     (insn & 0xfff)
> -
> -/*
> - * Prototypes
> - */
> -void _print_full_context(uint32_t);
> -void do_data_abort(uint32_t, uint32_t, Context_Control *);
> -
> -#endif /* _BSPABORT_H */
> +- *  ARM CPU Dependent Source
> +- *
> +- *  If you want a small footprint RTEMS, pls use simple_abort.c
> +- */
> +-
> +-/*
> +- *  COPYRIGHT (c) 2007 Ray Xu.
> +- *  mailto: Rayx at gmail dot com
> +- *
> +- *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
> +- *  Emmanuel Raguet, mailto:raguet at crf.canon.fr
> +- *
> +- *  Copyright (c) 2002 Advent Networks, Inc
> +- *      Jay Monkman <jmonkman at adventnetworks.com>
> +- *
> +- *  The license and distribution terms for this file may be
> +- *  found in the file LICENSE in this distribution or at
> +- *  http://www.rtems.org/license/LICENSE.
> +- *
> +- */
> +-
> +-#include <rtems/system.h>
> +-#include <rtems.h>
> +-#include <rtems/bspIo.h>
> +-#include "abort.h"
> +-
> +-uint32_t g_data_abort_cnt = 0;
> +-/*this is a big overhead for MCU only got 16K RAM*/
> +-uint32_t g_data_abort_insn_list[1024];
> +-
> +-
> +-char *_print_full_context_mode2txt[0x20]={
> +-  [0x0]="user",  /* User */
> +-  [0x1]="fiq",   /* FIQ - Fast Interrupt Request */
> +-  [0x2]="irq",   /* IRQ - Interrupt Request */
> +-  [0x3]="super", /* Supervisor */
> +-  [0x7]="abort", /* Abort */
> +-  [0xb]="undef", /* Undefined */
> +-  [0xf]="system" /* System */
> +-};
> +-
> +-void _print_full_context(uint32_t spsr)
> +-{
> +-    char *mode;
> +-    uint32_t prev_sp,prev_lr,cpsr,arm_switch_reg;
> +-    int i;
> +-
> +-    printk("active thread thread 0x%08x\n", rtems_task_self());
> +-
> +-    mode=_print_full_context_mode2txt[spsr&0x1f];
> +-    if(!mode) mode="unknown";
> +-
> +-    __asm__ volatile (ARM_SWITCH_TO_ARM
> +-              "       MRS  %[cpsr], cpsr \n"
> +-              "       ORR  %[arm_switch_reg], %[spsr], #0xc0 \n"
> +-              "       MSR  cpsr_c, %[arm_switch_reg] \n"
> +-              "       MOV  %[prev_sp], sp \n"
> +-              "       MOV  %[prev_lr], lr \n"
> +-              "       MSR  cpsr_c, %[cpsr] \n"
> +-            ARM_SWITCH_BACK
> +-              : [arm_switch_reg] "=&r" (arm_switch_reg), [prev_sp] "=&r"
> (prev_sp), [prev_lr] "=&r" (prev_lr),
> +-              [cpsr] "=&r" (cpsr)
> +-              : [spsr] "r" (spsr)
> +-              : "cc");
> +-
> +-    printk("Previous sp=0x%08x lr=0x%08x and actual cpsr=%08x\n",
> +-           prev_sp, prev_lr, cpsr);
> +-
> +-    for(i=0;i<48;){
> +-        printk(" 0x%08x",((uint32_t*)prev_sp)[i++]);
> +-        if((i%6) == 0)
> +-            printk("\n");
> +-    }
> +-
> +-}
> +-
> +-
> +-/* This function is supposed to figure out what caused the
> +- * data abort, do that, then return.
> +- *
> +- * All unhandled instructions cause the system to hang.
> +- */
> +-
> +-void do_data_abort(
> +-  uint32_t insn,
> +-  uint32_t spsr,
> +-  Context_Control *ctx
> +-)
> +-{
> +-    /* Clarify, which type is correct, CPU_Exception_frame or
> Context_Control */
> +-    uint8_t               decode;
> +-    uint8_t               insn_type;
> +-    rtems_interrupt_level level;
> +-
> +-    g_data_abort_insn_list[g_data_abort_cnt & 0x3ff] = ctx->register_lr
> - 8;
> +-    g_data_abort_cnt++;
> +-
> +-    decode = ((insn >> 20) & 0xff);
> +-
> +-    insn_type = decode & INSN_MASK;
> +-    switch(insn_type) {
> +-    case INSN_STM1:
> +-        printk("\n\nINSN_STM1\n");
> +-        break;
> +-    case INSN_STM2:
> +-        printk("\n\nINSN_STM2\n");
> +-        break;
> +-    case INSN_STR:
> +-        printk("\n\nINSN_STR\n");
> +-        break;
> +-    case INSN_STRB:
> +-        printk("\n\nINSN_STRB\n");
> +-        break;
> +-    case INSN_LDM1:
> +-        printk("\n\nINSN_LDM1\n");
> +-        break;
> +-    case INSN_LDM23:
> +-        printk("\n\nINSN_LDM23\n");
> +-        break;
> +-    case INSN_LDR:
> +-        printk("\n\nINSN_LDR\n");
> +-        break;
> +-    case INSN_LDRB:
> +-        printk("\n\nINSN_LDRB\n");
> +-        break;
> +-    default:
> +-        printk("\n\nUnrecognized instruction\n");
> +-        break;
> +-    }
> +-
> +-    printk("data_abort at address 0x%x, instruction: 0x%x,   spsr =
> 0x%x\n",
> +-           ctx->register_lr - 8, insn, spsr);
> +-
> +-    _print_full_context(spsr);
> +-
> +-    /* disable interrupts, wait forever */
> +-    rtems_interrupt_disable(level);
> +-    (void) level; /* avoid set but unused warning */
> +-
> +-    while(1) {
> +-        continue;
> +-    }
> +-}
> +-
> +diff --git c/src/lib/libbsp/arm/shared/abort/abort.h
> c/src/lib/libbsp/arm/shared/abort/abort.h
> +index 6d8704f..e69de29 100644
> +--- c/src/lib/libbsp/arm/shared/abort/abort.h
> ++++ c/src/lib/libbsp/arm/shared/abort/abort.h
> +@@ -1,52 +0,0 @@
> +-/*
> +- *  COPYRIGHT (c) 2007 Ray Xu.
> +- *  mailto: Rayx at gmail dot com
> +- *
> +- *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
> +- *  Emmanuel Raguet, mailto:raguet at crf.canon.fr
> +- *
> +- *  Copyright (c) 2002 Advent Networks, Inc
> +- *      Jay Monkman <jmonkman at adventnetworks.com>
> +- *
> +- *  The license and distribution terms for this file may be
> +- *  found in the file LICENSE in this distribution or at
> +- *  http://www.rtems.org/license/LICENSE.
> +- *
> +- */
> +-
> +-#ifndef _BSPABORT_H
> +-#define _BSPABORT_H
> +-
> +-#include <rtems/system.h>
> +-#include <rtems.h>
> +-#include <rtems/bspIo.h>
> +-
> +-#define INSN_MASK         0xc5
> +-
> +-#define INSN_STM1         0x80
> +-#define INSN_STM2         0x84
> +-#define INSN_STR          0x40
> +-#define INSN_STRB         0x44
> +-
> +-#define INSN_LDM1         0x81
> +-#define INSN_LDM23        0x85
> +-#define INSN_LDR          0x41
> +-#define INSN_LDRB         0x45
> +-
> +-#define GET_RD(x)         ((x & 0x0000f000) >> 12)
> +-#define GET_RN(x)         ((x & 0x000f0000) >> 16)
> +-
> +-#define GET_U(x)          ((x & 0x00800000) >> 23)
> +-#define GET_I(x)          ((x & 0x02000000) >> 25)
> +-
> +-#define GET_REG(r, ctx)      (((uint32_t   *)ctx)[r])
> +-#define SET_REG(r, ctx, v)   (((uint32_t   *)ctx)[r] = v)
> +-#define GET_OFFSET(insn)     (insn & 0xfff)
> +-
> +-/*
> +- * Prototypes
> +- */
> +-void _print_full_context(uint32_t);
> +-void do_data_abort(uint32_t, uint32_t, Context_Control *);
> +-
> +-#endif /* _BSPABORT_H */
> diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c
> b/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c
> index 76211da..035333a 100644
> --- a/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c
> +++ b/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c
> @@ -1,4 +1,7 @@
> -/*
> +/*@file
> + *@ingroup xilinx-zynq_i2c
> + *@brief
> + *
>   * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
>   *
>   *  embedded brains GmbH
> @@ -57,19 +60,31 @@ typedef struct {
>    bool hold;
>    rtems_id task_id;
>    uint32_t input_clock;
> -  rtems_vector_number irq;
> +  rtems_vector_number irq;xilinx-zynq_i2c
>  } cadence_i2c_bus;
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Disable cadence interrupts
> +*/
>  static void cadence_i2c_disable_interrupts(volatile cadence_i2c *regs)
>  {
>    regs->irqdisable = 0xffff;
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Clear irq status
> +*/
>  static void cadence_i2c_clear_irq_status(volatile cadence_i2c *regs)
>  {
>    regs->irqstatus = regs->irqstatus;
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Reset cadence
> +*/
>  static void cadence_i2c_reset(cadence_i2c_bus *bus)
>  {
>    volatile cadence_i2c *regs = bus->regs;
> @@ -90,6 +105,10 @@ static void cadence_i2c_reset(cadence_i2c_bus *bus)
>    cadence_i2c_clear_irq_status(regs);
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Set cadence i2c address size
> +*/
>  static uint32_t cadence_i2c_set_address_size(
>    const i2c_msg *msg,
>    uint32_t control
> @@ -104,6 +123,10 @@ static uint32_t cadence_i2c_set_address_size(
>    return control;
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Setup read transfer
> +*/
>  static void cadence_i2c_setup_read_transfer(
>    cadence_i2c_bus *bus,
>    volatile cadence_i2c *regs,
> @@ -138,6 +161,10 @@ static void cadence_i2c_next_byte(cadence_i2c_bus
> *bus)
>    }
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Cadence i2c write to fifo
> +*/
>  static void cadence_i2c_write_to_fifo(
>    cadence_i2c_bus *bus,
>    volatile cadence_i2c *regs
> @@ -164,6 +191,10 @@ static void cadence_i2c_write_to_fifo(
>    }
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Setup cadence i2c write transfer
> +*/
>  static void cadence_i2c_setup_write_transfer(
>    cadence_i2c_bus *bus,
>    volatile cadence_i2c *regs,
> @@ -176,6 +207,10 @@ static void cadence_i2c_setup_write_transfer(
>    cadence_i2c_write_to_fifo(bus, regs);
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Setup cadence i2c transfer
> +*/
>  static void cadence_i2c_setup_transfer(
>    cadence_i2c_bus *bus,
>    volatile cadence_i2c *regs
> @@ -218,6 +253,10 @@ static void cadence_i2c_setup_transfer(
>    regs->address = CADENCE_I2C_ADDRESS(msgs->addr);
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Continue cadence i2c read transfer
> +*/
>  static void cadence_i2c_continue_read_transfer(
>    cadence_i2c_bus *bus,
>    volatile cadence_i2c *regs
> @@ -253,6 +292,10 @@ static void cadence_i2c_continue_read_transfer(
>    }
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Interrup cadence i2c
> +*/
>  static void cadence_i2c_interrupt(void *arg)
>  {
>    cadence_i2c_bus *bus = arg;
> @@ -321,6 +364,10 @@ static void cadence_i2c_interrupt(void *arg)
>    }
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Cadence i2c transfer
> +*/
>  static int cadence_i2c_transfer(
>    i2c_bus *base,
>    i2c_msg *msgs,
> @@ -362,6 +409,11 @@ static int cadence_i2c_transfer(
>    return bus->irqstatus == 0 ? 0 : -EIO;
>  }
>
> +
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Set cadence i2c clock
> +*/
>  static int cadence_i2c_set_clock(i2c_bus *base, unsigned long clock)
>  {
>    cadence_i2c_bus *bus = (cadence_i2c_bus *) base;
> @@ -407,6 +459,10 @@ static int cadence_i2c_set_clock(i2c_bus *base,
> unsigned long clock)
>    return 0;
>  }
>
> +/*
> + at ingroup xilinx-zynq_i2c
> + at brief Destroy cadence i2c
> +*/
>  static void cadence_i2c_destroy(i2c_bus *base)
>  {
>    cadence_i2c_bus *bus = (cadence_i2c_bus *) base;
> diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h
> b/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h
> index c06a47c..a5a4e02 100644
> --- a/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h
> +++ b/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h
> @@ -1,4 +1,8 @@
>  /*
> + *@file
> + *@defgroup xilinx-zynq_i2c Cadenc I2C Setup
> + *
> + *
>   * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
>   *
>   *  embedded brains GmbH
> _______________________________________________
> devel mailing list
> devel at rtems.org
> http://lists.rtems.org/mailman/listinfo/devel
>
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