[PATCH] ARM: Add BSP_NEEDS_REGISTER_INITIALIZATION
Martin Galvan
martin.galvan at tallertechnologies.com
Thu Feb 26 12:38:06 UTC 2015
On Thu, Feb 26, 2015 at 5:23 AM, Sebastian Huber
<sebastian.huber at embedded-brains.de> wrote:
>
> Hello Martin,
>
> can you please use BSP_START_* and bsp_start_* prefixes. Since this bsp_init_registers_banked seems to be FIQ specific it should reflect this in its name. The term banked it used in so many different places, e.g. hypervisor mode etc.
Will do. Thanks for the feedback!
>
> On 25/02/15 15:52, Martin Galvan wrote:
>>
>> Follow-up from here:
>>
>> https://lists.rtems.org/pipermail/devel/2015-February/009974.html
>>
>> This patch adds the macro BSP_NEEDS_REGISTER_INITIALIZATION and three hooks for BSP-specific register init code to arm/shared/start.S. Said hooks are bsp_init_registers_core (intended for initializing the ARM core registers), bsp_init_registers_banked (for the FIQ mode banked registers) and bsp_init_registers_vfp (for the FPU registers). BSP_NEEDS_REGISTER_INITIALIZATION would be defined in a BSP's configure.ac (so that it appears in its bspopts.h).
>>
>> This patch also adds the register init code required by the TMS570. We've tested it with the tms570ls3137_hdk.cfg config and it works fine.
>>
>> --
>>
>> c/src/lib/libbsp/arm/shared/start/start.S | 28 +++++++++++++++++++++++++
>> c/src/lib/libbsp/arm/tms570/Makefile.am | 1 +
>> c/src/lib/libbsp/arm/tms570/configure.ac | 5 +++++
>> c/src/lib/libbsp/arm/tms570/startup/bsp-init-registers.S | 89 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>> 4 files changed, 123 insertions(+)
>>
>> diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S
>> index f5f0fa4..fa884ee 100644
>> --- a/c/src/lib/libbsp/arm/shared/start/start.S
>> +++ b/c/src/lib/libbsp/arm/shared/start/start.S
>> @@ -48,6 +48,12 @@
>> .extern _ARMV4_Exception_fiq_default
>> .extern _ARMV7M_Exception_default
>>
>> +#ifdef BSP_NEEDS_REGISTER_INITIALIZATION
>> + .extern bsp_init_registers_core
>> + .extern bsp_init_registers_banked
>> + .extern bsp_init_registers_vfp
>> +#endif
>> +
>> /* Global symbols */
>> .globl _start
>> .globl bsp_start_vector_table_begin
>> @@ -127,6 +133,10 @@ _start:
>> * loader.
>> */
>>
>> +#ifdef BSP_NEEDS_REGISTER_INITIALIZATION
>> + bl bsp_init_registers_core
>> +#endif
>> +
>> #ifdef RTEMS_SMP
>> /* Read MPIDR */
>> mrc p15, 0, r0, c0, c0, 5
>> @@ -161,6 +171,10 @@ _start:
>> add sp, r1
>> #endif
>>
>> +#ifdef BSP_NEEDS_REGISTER_INITIALIZATION
>> + bl bsp_init_registers_banked
>> +#endif
>> +
>> /* Enter ABT mode and set up the ABT stack pointer */
>> mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
>> msr cpsr, r0
>> @@ -207,6 +221,11 @@ _start:
>> /* Enable FPU */
>> mov r0, #(1 << 30)
>> vmsr FPEXC, r0
>> +
>> +#ifdef BSP_NEEDS_REGISTER_INITIALIZATION
>> + bl bsp_init_registers_vfp
>> +#endif
>> +
>> #endif /* ARM_MULTILIB_VFP */
>>
>> /*
>> @@ -304,6 +323,10 @@ bsp_start_vector_table_end:
>>
>> _start:
>>
>> +#ifdef BSP_NEEDS_REGISTER_INITIALIZATION
>> + bl bsp_init_registers_core
>> +#endif
>> +
>> #ifdef ARM_MULTILIB_VFP
>> /*
>> * Enable CP10 and CP11 coprocessors for privileged and user mode in
>> @@ -315,8 +338,13 @@ _start:
>> str r1, [r0]
>> dsb
>> isb
>> +
>> +#ifdef BSP_NEEDS_REGISTER_INITIALIZATION
>> + bl bsp_init_registers_vfp
>> #endif
>>
>> +#endif /* ARM_MULTILIB_VFP */
>> +
>> ldr sp, =bsp_stack_main_end
>> ldr lr, =bsp_start_hook_0_done + 1
>> b bsp_start_hook_0
>> diff --git a/c/src/lib/libbsp/arm/tms570/Makefile.am b/c/src/lib/libbsp/arm/tms570/Makefile.am
>> index bf3465d..c10a145 100644
>> --- a/c/src/lib/libbsp/arm/tms570/Makefile.am
>> +++ b/c/src/lib/libbsp/arm/tms570/Makefile.am
>> @@ -85,6 +85,7 @@ libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
>> libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
>> libbsp_a_SOURCES += startup/bspreset.c
>> libbsp_a_SOURCES += startup/bspstart.c
>> +libbsp_a_SOURCES += startup/bsp-init-registers.S
>>
>> # POM
>> libbsp_a_SOURCES += pom/tms570-pom.c
>> diff --git a/c/src/lib/libbsp/arm/tms570/configure.ac b/c/src/lib/libbsp/arm/tms570/configure.ac
>> index cefe50a..6b52e74 100644
>> --- a/c/src/lib/libbsp/arm/tms570/configure.ac
>> +++ b/c/src/lib/libbsp/arm/tms570/configure.ac
>> @@ -36,6 +36,11 @@ RTEMS_BSPOPTS_SET([BSP_MINIMUM_TASK_STACK_SIZE],[*],[1024])
>> RTEMS_BSPOPTS_HELP([BSP_MINIMUM_TASK_STACK_SIZE],[Suggested minimum task stack
>> size in bytes])
>>
>> +RTEMS_BSPOPTS_SET([BSP_NEEDS_REGISTER_INITIALIZATION],[*],[1])
>> +RTEMS_BSPOPTS_HELP([BSP_NEEDS_REGISTER_INITIALIZATION],
>> + [The TMS570 needs to have the registers of its CPU initialized
>> + to avoid CCMR4F errors])
>> +
>> RTEMS_BSPOPTS_SET([TMS570_OSCILLATOR_MAIN],[*],[12000000U])
>> RTEMS_BSPOPTS_HELP([TMS570_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
>>
>> diff --git a/c/src/lib/libbsp/arm/tms570/startup/bsp-init-registers.S b/c/src/lib/libbsp/arm/tms570/startup/bsp-init-registers.S
>> new file mode 100644
>> index 0000000..1c58918
>> --- /dev/null
>> +++ b/c/src/lib/libbsp/arm/tms570/startup/bsp-init-registers.S
>> @@ -0,0 +1,89 @@
>> +/**
>> + * @file bsp-init-registers.S
>> + *
>> + * @brief CPU register initialization routines for the TMS570.
>> + */
>> +
>> +/*
>> + * Copyright (c) 2015 Taller Technologies. All rights reserved.
>> + *
>> + * @author Martin Galvan <martin.galvan at tallertechnologies.com>
>> + *
>> + * The license and distribution terms for this file may be
>> + * found in the file LICENSE in this distribution or at
>> + * http://www.rtems.org/license/LICENSE.
>> + */
>> +
>> +/*
>> + * These routines perform the initialization of the CPU registers of the TMS570.
>> + * This is necessary because of the 1oo1D lockstep execution of the TMS570's CCMR4F.
>> + */
>> +
>> +#include <rtems/asm.h>
>> +
>> +.section .text
>> +.syntax unified
>> +.cpu cortex-r4
>> +.arm
>> +
>> +/* Initialization of the ARM core registers. */
>> +FUNCTION_ENTRY(bsp_init_registers_core)
>> + mov r0, #0
>> + mov r1, #0
>> + mov r2, #0
>> + mov r3, #0
>> + mov r4, #0
>> + mov r5, #0
>> + mov r6, #0
>> + mov r7, #0
>> + mov r8, #0
>> + mov r9, #0
>> + mov r10, #0
>> + mov r11, #0
>> + mov r12, #0
>> + mov r13, #0
>> +
>> + bx lr
>> +FUNCTION_END(bsp_init_registers_core)
>> +
>> +/* Initialization of the FIQ mode banked registers. */
>> +FUNCTION_ENTRY(bsp_init_registers_banked)
>> + mov r8, #0
>> + mov r9, #0
>> + mov r10, #0
>> + mov r11, #0
>> + mov r12, #0
>> +
>> + bx lr
>> +FUNCTION_END(bsp_init_registers_banked)
>> +
>> +#ifdef ARM_MULTILIB_VFP
>> +
>> +/* Initialization of the FPU registers. */
>> +FUNCTION_ENTRY(bsp_init_registers_vfp)
>> + stmfd sp!, {r0}
>> +
>> + mov r0, #0
>> + vmov d0, r0, r0
>> + vmov d1, r0, r0
>> + vmov d2, r0, r0
>> + vmov d3, r0, r0
>> + vmov d4, r0, r0
>> + vmov d5, r0, r0
>> + vmov d6, r0, r0
>> + vmov d7, r0, r0
>> + vmov d8, r0, r0
>> + vmov d9, r0, r0
>> + vmov d10, r0, r0
>> + vmov d11, r0, r0
>> + vmov d12, r0, r0
>> + vmov d13, r0, r0
>> + vmov d14, r0, r0
>> + vmov d15, r0, r0
>> +
>> + ldmfd sp!, {r0}
>> +
>> + bx lr
>> +FUNCTION_END(bsp_init_registers_vfp)
>> +
>> +#endif /* ARM_MULTILIB_VFP */
>
>
> --
> Sebastian Huber, embedded brains GmbH
>
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
> Phone : +49 89 189 47 41-16
> Fax : +49 89 189 47 41-09
> E-Mail : sebastian.huber at embedded-brains.de
> PGP : Public key available on request.
>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>
--
Martín Galván
Software Engineer
Taller Technologies Argentina
San Lorenzo 47, 3rd Floor, Office 5
Córdoba, Argentina
Phone: 54 351 4217888 / +54 351 4218211
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