RISC-V interrupt vectoring
Denis Obrezkov
denisobrezkov at gmail.com
Mon Jul 3 05:36:30 UTC 2017
2017-07-03 4:59 GMT+02:00 Hesham Almatary <heshamelmatary at gmail.com>:
> You can have a look at riscv-pk [1] as a RISC-V reference how to
> handle interrupts. RTEMS-wise, you can look at or1k and ARM code and
> how the platform-dependent interrupt handling code is linked to
> platform-independent one.
>
> mcause value can be used as an index to a software vector table that you
> set up.
>
> Why do you need software interrupts? GSoC-wise, I thought the plan was
> to develop UART/Console driver (which doesn't need interrupts), and
> use simulated ticker, as a first step. Then it will be easier to
> debug/proceed from there with interrupt handling code.
>
I thought, I have to implement an interrupt console driver. Okay, then I am
going to
investigate a simulated ticker.
--
Regards, Denis Obrezkov
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