[PATCH 2/2] spec/aarch64: Only apply SUBALIGN(4) to ILP32

Sebastian Huber sebastian.huber at embedded-brains.de
Fri Nov 13 14:16:06 UTC 2020


On 13/11/2020 15:13, Kinsey Moore wrote:

> -----Original Message-----
> From: Sebastian Huber<sebastian.huber at embedded-brains.de>  
> Sent: Friday, November 13, 2020 04:26
> To: Kinsey Moore<kinsey.moore at oarcorp.com>;devel at rtems.org
> Subject: Re: [PATCH 2/2] spec/aarch64: Only apply SUBALIGN(4) to ILP32
>
>> On 12/11/2020 14:32, Kinsey Moore wrote:
>>
>>> The SUBALIGN(4) required on rtemsroset and rtemsrwset for ILP32 builds
>>> was previously present on LP64 builds and causes no issues within
>>> RTEMS, but causes relocation/alignment issues when building libbsd.
>>> This restricts those alignment changes to ILP32 builds.
>> The SUBALIGN() is currently only used on aarch64 in RTEMS. Why is it necessary? The PowerPC port for example uses a single linkcmds.base for the 32-bit and 64-bit without a SUBALIGN().
> The SUBALIGN was necessary because the default alignment was 8 bytes and the ILP32 code would fail during initialization while iterating over the linker sets since the upper half-word of every address was zeroed out and was being treated as another init call. Is there a preferred way to accomplish this that doesn't involve SUBALIGN?

Why can't you remove all the SUBALIGN() from the linker script?

For example

aarch64-rtems6-ld --verbose | grep SUBALIGN

has no output.

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