[PATCH] bsps/riscv: Clear interrupt complete before disable

Sebastian Huber sebastian.huber at embedded-brains.de
Mon Mar 6 08:41:28 UTC 2023

On 06.03.23 09:37, Padmarao.Begari at microchip.com wrote:
>> Is
>> the claim complete message ignored if the interrupt is disabled?
> Yes.

Is this an intended and documented behaviour of the PLIC? This is a 
hardware bug from my point of view. If we really need a software 
workround just for the PLIC to work with the interrupt server, then we 
should add a new function for this and keep the interrupt disable as is.

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