[PATCH] bsps/riscv: Clear interrupt complete before disable

[Padmarao.Begari at microchip.com]

Hi Sebastian,

> On Mon, 2023-03-06 at 09:41 +0100, Sebastian Huber wrote:
> 
> On 06.03.23 09:37, Padmarao.Begari at microchip.com wrote:
> > > Is
> > > the claim complete message ignored if the interrupt is disabled?
> > > 
> > Yes.
> 
> Is this an intended and documented behaviour of the PLIC?

Not documented
>  This is a
> hardware bug from my point of view. If we really need a software
> workround just for the PLIC to work with the interrupt server, then
> we
> should add a new function for this and keep the interrupt disable as
> is.

Ok

Regards
Padmarao
> 
> --
> embedded brains GmbH
> Herr Sebastian HUBER
> Dornierstr. 4
> 82178 Puchheim
> Germany
> email: sebastian.huber at embedded-brains.de
> phone: +49-89-18 94 741 - 16
> fax:   +49-89-18 94 741 - 08
> 
> Registergericht: Amtsgericht München
> Registernummer: HRB 157899
> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas
> Dörfler
> Unsere Datenschutzerklärung finden Sie hier:
> https://embedded-brains.de/datenschutzerklaerung/