[PATCH rtems-docs 2/2] user/zynqmp: Add NAND driver information

Chris Johns chrisj at rtems.org
Wed Mar 22 00:39:47 UTC 2023

On 22/3/2023 7:00 am, Kinsey Moore wrote:
> ---
>  user/bsps/aarch64/xilinx-zynqmp.rst | 9 +++++++++
>  1 file changed, 9 insertions(+)
> diff --git a/user/bsps/aarch64/xilinx-zynqmp.rst b/user/bsps/aarch64/xilinx-zynqmp.rst
> index 4de0115..e30c3f6 100644
> --- a/user/bsps/aarch64/xilinx-zynqmp.rst
> +++ b/user/bsps/aarch64/xilinx-zynqmp.rst
> @@ -250,6 +250,15 @@ Console Driver
>  The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART
>  as well as the physical ARM PL011 PrimeCell UART in the ZynqMP hardware.
> +NAND Controller Driver
> +----------------------
> +
> +The ZynqMP BSP has a NAND controller driver which allows writing to and reading
> +from one or more attached NAND chips. This driver was imported from the Xilinx
> +embeddedsw repository and requires the clock to be configured since it is a
> +polling driver and not interrupt-driven. This driver is only available for
> +hardware BSPs since QEMU does not emulate the NAND controller.

Is the JFFS support that uses this driver for production or just an example?

I ask because the QSPI driver takes control of the whole flash and that is
confusing if you run an app that has a boot image in the same device because the
JFFS erases it.


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