Processor Load

[Joel Sherrill]

Gunter Magin wrote:
> 
> On Tue, Sep 26, 2000 at 09:41:49AM -0500, Joel Sherrill wrote:
> > The most accurate solution is to have a counter/time that is checked
> > each time a task switch occurs.  Then the outgoing task is "charged"
> > for the time spent executing.
> 
> Are there any hooks in the scheduler available where a BSP function can
> be called to read a high resolution free running clock, as it is available
> in some modern processors?

Yes.  They are called user extensions.  You can have hooks at various
times in a tasks life (create, start, begin, delete, switch, etc.)

> For instance, the 8xx family has the TMBH/TMBL combo or the decrementer
> register (the last one is common to all members of the PPC architecture),
> which can be configured to run with a very high resolution (up to
> SYSCLOCK/4).
> 
> I already use that timer successfully to evaluate the behaviour of my
> device drivers.

It should be relatively easy to take the existing libmisc/cpuuse code,
copy it, and modify it to call BSP specific routines to read the a 
"performance timer."  Let the generic code do the accounting. 

Critically, the "performance timer" (bad name) interface should be able
to be used for that as well as the rtmonuse code.  

If the modifications are kept discrete enough, then the code for the
two variants (clock tick and BSP timer) could be built using the 
same base source code and a set of macro definitions.  See some of the
code in libchip/serial/*reg* for examples.

> gm

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel at OARcorp.com                 On-Line Applications Research
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