Is there any Guru who knows why interrupts are disabled in ISR?

[Leon Pollak]

> But from 8085, or z80, we know that inside
> the ISR the interrupt has to be disabled, specifically if it is
> level-triggered interrupt. because once u have started servicing the
> interrupt, u dont want the external hardware to interrupt for the "Same"
> cause. so it prevents re-entry of code, and possible stack overflow if the
> isr is too long, and processor hasent disabled the interrupt itself.
Interrupt in service is blocked in all CPUs that I know - till you
acknowledge
it by executing RTI instruction or by any other specific way.


> maybe in the isr you are talking about, there is some  machine specific
> part of code that is not reentrant (or they dont want it to be
> re-entrant for some reason).
I am speeking about the theory. I checked some other CPUs code in RTEMS
and saw that this is common to all of them.
I wanted to allow the high priority interrupts to be able to preempt the low
priority
interrupts. And the MPC860 CPU that I am using has all necessary means for
this.
Except the RTEMS code...:-))


> regards
> Vivek
Thanks.
Leon