more multiple dec21140 on ppc

[Till Straumann]

gregory.menke at gsfc.nasa.gov wrote:
> (sorry Till, I sent a copy to to alone by accident...)
> 
> 
> I'm still working on it and have little more to report except that its
> increasingly looking like something isn't quite configured right in
> MPIC or the PBC.  
> 
> Shifting the onboard dec to MPIC irq 2 (which its supposed to be wired
> to) causes it to stop receiving interrupts (and I am changing its
> INTERRUPT_LINE value to 2, with name = 18).  I've only been able to
> make the onboard dec operate under its ISA irq 10.
> 

Hmm - I cannot reproduce your problem on my mvme2306 board.
Here's what works (with both, the original dec21140.c and the
modified version you sent me a couple of days ago) on my board:

a) I do nothing, boot -> dec driver reports it is using interrupt 10
    which in fact is the ISA interrupt.

b) Knowing (from the manual) that the ethernet chip is also hooked
    to OpenPIC IRQ2, I use PPCbug (knowing that the on-board dec is
    in slot 0xe) to manually fix the PCI_INTERRUPT_LINE config register:

    CSAW 0 e 0 3c 12 ; B
    NBO

    I.e. I use PPCBug to write the INTERRUPT_LINE register.
    I added the BSP_PCI_INTERRRUPT_LOWEST_OFFSET because the driver
    currently does not do so. Note that PPCBug takes hex arguments,
    i.e. the 12 value corresponds to decimal 18 which is picked up
    by the driver/BSP and used 1:1 as the 'irq name'.

    After booting up (the _identical_ application binary), the driver
    reports it's now using IRQ 18 and it works fine.

    If I provide the CSAW command with anything else than
    0xa (isa irq) or 0x12 (OpenPIC IRQ) the driver does not get
    any interrupts, as expected.

-- Till

> I've dumped the MPIC registers and they look fine.  I'm wondering if
> the PBC might be remapping the PCI interrupt lines- or doing something
> with them.  It doesn't appear to be remapping them in complete
> accordance with default ISA assignments as documented in the
> programmers guide because the cpci board also won't generate an
> interrupt on ISA irq5 regardless of the INTERRUPT_PIN value.
> 
> The mcp750 docs imply that the PBC doesn't stop the interrupt
> signalling from routing thru the MPIC regardless of what it does with
> remapping, can someone confirm this?
> 
> Naturally, VIA is lame with respect to datasheets, so it will be an
> ordeal to find the datashsheet which documents the interrupt
> remapping.  If anyone in posession of the info could comment on what
> is likely going on, I'd really appreciate it.
> 
> The cpci bridge appears not to be involved with interrupt signalling
> (or acknowledging for that matter)- so I'm also starting to wonder if
> the dec board is actually issuing an interrupt.  <something> is going
> on because I can see a PCI interrupt line assert after the board is
> initialized, but I don't know the details yet.  I guess my next step
> is to dump the board registers and see what its up to.
> 
> Thanks,
> 
> Gregm
> 
>