ppc405 dma - vm - cache question

[Kate Feng]

gregory.menke at gsfc.nasa.gov wrote:

>Kate Feng writes:
> > 
> > gregory.menke wrote :
> > 
> > > Feng, Shuchen writes:
> > 
> > >> I do not know how well ethernet driver perform with non-cacheable
> > memory.
> > 
> > > Please ask this question more specifically.
> > 
> > Thanks.  It was not a question.  I meant I did not have to
> > write  the ethernet driver  accessing non-cacheable memory.
> > Thus I do not know the performance.
>
>The ethernet hardware and packet buffers must be non-cached, else the
>cache will interfere with reading and writing the registers as well as
>the packet buffers.
>
>
>  
>
I had mentioned in my previous E-mail that I had the buffers in the
cachable area by turning on the hardware snoop mechanism provided
by my  mvme5500 board for the DMA transfer and other network involved
activities.  This is achieved via the sophisticated system controller
of the board.  I found the 10/100MHZ ethernet of mvme5500 twice
faster (or sometimes more) than that of mvme2307 by running some
EPICS network tests.  However, I do not have time or need to study the
code of the motorola_powerpc BSP to find out the cache issue for the
network driver.  Maybe it's easier if you can point out.


For boards that do not provide hardware snoop, it would
be interesting to weight between the option of the software snoop in
RTEMS v.s. the option of the non-cached memory.  I thought BSD software
deals with the software snoop option via the software routines Gene
Smith pointed out in his original message.

bus_dmamap_create();
bus_dmamem_alloc();
bus_dmamap_load();
bus_dmamap_sync();




Regards,
Kate