NIOS2 port (was: Toolchain advice needed)

Thu Dec 22 00:53:09 UTC 2005

> I'll try.

Just to let you know the current state of my RTEMS-on-NIOS2 project...

1 - toolchain: I now have prepared a nios2-rtems toolchain based on Altera's
3.4.1 gcc with a -rtems configuration and CVS newlib (with some code from
Altera from their 1.12 newlib, excluding libgloss), running on Linux host.

2 - hardware and debugging: the Altera-provided gdb and insight run under
Linux and can download and debug code via TCP to a "tiny" NIOS2 core on an
Altium EB2 Cyclone evaluation board (EP1C12 with 1 MB SRAM attached). The
board is actually connected via homebrew USB-Blaster clone to a Win2K host
running Altera's jtagserver, nios2-terminal and nios2-gdb-server. No high
level stuff such as displaying thread lists yet, but it's much better than
just a LED blinking on the board (or not)

3 - RTEMS port: (based on code from 2005/7, but shouldn't be too complicated
to carry forward to CVS base) RTEMS got a cpukit/score/cpu directory,
lib/libbsp and lib/libcpu (and code within these) so that some of the single
processor tests pass. Actually, all seem to pass except for partition/region
manager calls (sp15,sp16,sp25), floating point stuff (sp19), rate monotonic
manager (sp20).

The NIOS2 in my setup is really only the tiny/economy core ("II/e") without
caches, and console output goes via (polled) JTAG "UART" to nios2-console on
the Win2K host.  Beside a 1ms system clock there are no further peripherals
supported yet.

Now on the "TO DO" list are...

- cleaning up the gcc/newlib patches and putting them online
- changing base from RTEMS-20050722 to current CVS HEAD
- cleaning, documenting and publishing the RTEMS cpukit and bsp code
- fixing the obvious remaining issues with RTEMS port
- optimizing ...
- adding device drivers for common Altera stuff and OpenCores.org EthMac
- adding support for the cache in Nios II/s and /f.
- automatic configuration of BSP from Altera's PTF file (system descr.)

Cleaning and documenting is probably the most important task at this moment
and will take some time until anything can be published. Whoever is
interested in this work please answer here or mail waschk at telos.de so I
know that the effort for cleaning/documenting/publishing is appreciated. It
would also be interesting to know if you have some particular target
configuration in mind, regarding the boot process, devices, memory layout,
console device etc...

Kolja

-- 
Mr. Kolja Waschk, telos.de - +49(40) 450173-0; Fax -99
telos EDV Systementwicklung GmbH - Schlueterstrasse 16 - D-20146 Hamburg