MVME5500 status, and on to PMC interrupts

Kate Feng feng1 at
Tue Mar 1 13:45:50 UTC 2005

Peter Dufault wrote:

> On Mar 1, 2005, at 6:36 AM, Kate Feng wrote:
> >
> > Maybe it will help if you can send me your code  so that I can
> > understand what went wrong.  I do not have a PMCSPAN module.
> > However, I  will read the datasheet you sent me.
> >
> >
> > In your log :
> >> pmc730_1 at 0x01FFED68: 0/2/2/0 base address B4000000 intr 0E.
> >
> > For the 0/2/2/0,  I am not sure what  the first 0/ means  ?
> That is the "pcinum" in the "PCIx" code in the mvme5500/pci directory.
> There are indeed two completely independent PCI busses on the mvme5500,
> and "pcinum" is which of the two independent busses is being accessed.

The 0xB4000000 address is not mapped by the BSP.  To access it,
you can enable the mapping by using the  additional BAT registers
(e.g. BAT4-BAT7) referencing the  processor manual from the

Another option is to use triv121PgTblMap() written by Till Straumann.
The examples are in the BSPs of the shared powerPC as well as M5500
(e.g. BSP_pgtbl_xxxx).


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