PCI caching question related to mvme5500

[Peter Dufault]

On Nov 1, 2005, at 11:29 AM, gregory.menke at gsfc.nasa.gov wrote:

>
> OTOH, maybe the board has an internal buffer that it fills w/ data and
> making that part cacheable might expedite copying it off the  
> board.  But
> I think the OP would be better served by using DMA- my impression  
> being
> its plain PIO right now, which can cut throughput on the PCI bus by a
> factor of 6.
>
The board has a double-buffered region mapped onto the bus.  When the  
data is ready I invalidate the cache every cache line and then memcpy  
the data off.  Without reading through a cached region the CPU won't  
prefetch and the throughput is terrible.  With it you should be able  
to run at PCI memory speed.

There are many situations, e.g. small frame sizes as in this case,  
where I'd rather have prefetch (and posted writes for output) than DMA.

Peter