PCI caching question related to mvme5500

Peter Dufault dufault at hda.com
Tue Nov 1 18:38:52 UTC 2005

On Nov 1, 2005, at 1:20 PM, gregory.menke at gsfc.nasa.gov wrote:

> This is essentially PIO mode, the slowest possible way of getting data
> off the PCI bus.  If you're lucky it may burst but you can't confirm
> that without a bus analyzer.  This is very likely why you're having
> performance issues.  Its cutting your bus throughput by about a factor
> of 6.  You should consider using DMA to get your data off the board.

ARG!  I'm NOT having performance issues! I know it's bursting because  
of the difference between with and without cacheing turned on.   I'm  
reading 32 bytes, what is that, one cache line?  The board doc says:  
"Burst read of PMC341 memory buffer will allow a 40Mbyte per second  
data read rate".

But if I don't cache it I do have problems.


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