ERC32 with FPU rev.B or rev.C

[Jiri Gaisler]

On 03/06/2014 12:02 PM, Zandin Johan RUAG wrote:
> That depends. Which FPU revision is present in the TSC695F chip?
> That one is used in a lot of ESA missions, but I can't find any FPU revision information in its documentation...

The errata for TSC695F is here:

http://aerosupport.atmel.com/Atmel/doc4280.pdf

The old FPU bugs are removed, although there is a new one
that needs to fixed at compiler level rather then in RTEMS ...

Jiri.


> 
> Johan Zandin
> Computer Engineer
> 
> RUAG Space AB
> SE-405 15 Göteborg · Sweden 
> Tel. +46 31 735 41 47
> johan.zandin at ruag.com
> www.ruag.se
> 
> 
>> -----Original Message-----
>> From: rtems-users-bounces at rtems.org [mailto:rtems-users-
>> bounces at rtems.org] On Behalf Of Sebastian Huber
>> Sent: onsdag den 5 mars 2014 09:25
>> To: RTEMS; RTEMS
>> Subject: ERC32 with FPU rev.B or rev.C
>>
>> Hello,
>>
>> there is a fix for the ERC32 with FPU rev.B or rev.C in the SPARC interrupt
>> entry code:
>>
>> http://git.rtems.org/rtems/tree/c/src/lib/libbsp/sparc/shared/irq_asm.S#n4
>> 26
>>
>> Exists there systems with such a processor?  Is it reasonable to ship RTEMS
>> 4.11 or later on such a system?
>>
>> I would like to remove this code block.
>>
>> --
>> Sebastian Huber, embedded brains GmbH
>>
>> Address : Dornierstr. 4, D-82178 Puchheim, Germany
>> Phone   : +49 89 189 47 41-16
>> Fax     : +49 89 189 47 41-09
>> E-Mail  : sebastian.huber at embedded-brains.de
>> PGP     : Public key available on request.
>>
>> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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