Using RTEMS on Zynq ultrascale in 32bit mode

[Jan.Sommer at dlr.de]

Hello,

we will have access to a Xilinx Zynq ultrascale+ soon.
It has 4xA53 cores. 
If I understand it correctly they are based on AArch64 which is currently not supported by RTEMS.
However, running the processors in 32bit mode would be sufficient.
I have some problems determining what is already present in RTEMS for a BSP.
Has by any chance someone already done that?
I only started to look at the RM of the SoC and try to determine which core devices have changes and need new/updated drivers in the shared arm directory.
Any guidance would be greatly appreciated. Is it the right idea to start with the A9-based BSPs and go from there?

Best regards,

   Jan


Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR)
German Aerospace Center
Simulation and Software Technology | Software for Space Systems and Interactive Visualization | Lilienthalplatz 7 | 38108 Braunschweig | Germany

Jan Sommer
Telephone +49 531 295-2494 | Telefax 0531 295-2767 | jan.sommer at dlr.de
DLR.de/SC