Question about SIS for RTEMS 5 and timing

[Joel Sherrill]

On Thu, Aug 6, 2020 at 3:54 PM Fabrício de Novaes Kucinskis <
fabricio.kucinskis at inpe.br> wrote:

> Hello all, I hope everyone on the list is health and safe.
>
>
>
> I’m studying the update of a SPARC project, currently based on RTEMS 4.11,
> to RTEMS 5.
>
>
>
> After installing RTEMS 5, the first thing I did was compile and run, on
> SIS, a set of example applications.
>
>
>
> When calling sparc-rtems5-sis, I noticed that the loaded application run
> fast as hell, as SIS was just calling one instruction after the other, with
> no timing concerns – different from what I saw on older versions.
>
>
>
> I’ve tried to set the frequency with the “-freq” parameter, but this makes
> no difference. I also checked the RTEMS SPARC BSP sources, and the
> CLOCK_SPEED definition inside the trap table is still set to 10, as ever.
>
>
>
> Can anyone say what is different between the previous and current SIS
> versions, and how can I make the applications run with a reasonable timing?
>

AFAIK sis is cycle accurate for the instructions inside its simulated
world. But the erc32 is VERY slow compared to the host processor and
simulated code runs incredibly fast. 1 second of erc32 CPU time takes much
less time to simulate.

There is a perf command in sis to get the view of the simulated CPU time.

I've cc'ed Jiri so he can add anything.

>
>
> Thanks in advance and best regards,
>
>
>
> Fabrício.
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