Acessing PL devices of Xilinx Zedboard

[Jan.Sommer at dlr.de]

Hello,

We try to use the xilinx_zynq_zedboard BSP with some devices synthesized to the PL, e.g. a Xilinx NS16550 Uart.
If I try to access any of the AXI registers, I get a fatal error with a vector number 0x04 (undefined instruction).
Accessing the same register address from within a Xilinx standalone hello-world program works as expected.
Could it be that during the RTEMS startup some of the system initialization is reset so that accessing the PL devices fails?

I tried to boot the RTEMS application with u-boot and with the Xilinx Vitis IDE. At least the latter should initialize the PS correctly.
Does someone have some suggestions where to look?

Best regards,

    Jan

Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR)
German Aerospace Center
Institute for Software Technology | Software for Space Systems and Interactive Visualization | Lilienthalplatz 7 | 38108 Braunschweig | Germany

Jan Sommer