Acessing PL devices of Xilinx Zedboard

[Jan.Sommer at dlr.de]

Hi Sebastian,

I tried to follow the implementation of the small tables, but had some troubles understanding how it works.
	
> BSP_START_TEXT_SECTION static inline void
> arm_cp15_start_set_translation_table_entries(
>   uint32_t *ttb,
>   const arm_cp15_start_section_config *config
> )
> {
>   if (config->begin != config->end) {
>     uint32_t i;
>     uint32_t iend;
>     uint32_t index_mask;
>     uint32_t flags;
> #ifdef ARM_MMU_USE_SMALL_PAGES
>     uint32_t *pt;
> 
>     pt = &ttb[ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT];
>     i = ARM_MMU_SMALL_PAGE_GET_INDEX(config->begin);
>     iend = ARM_MMU_SMALL_PAGE_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));

ARM_MMU_SECT_MVA_ALIGN_UP seems to round the end address up to the next MiB (e.g. 0x40001000 -> 0x40100000).
Doesn't that mean that now all 4kiB pages until the next 1MiB will be setup according to "config->flags" in the loop below, i.e. the same as using 1MiB sections?

I would have expected that the address in config->end is rounded up only to the next 4kiB boundary, but I am not sure if I missed something.

>     index_mask = (1U << (32 - ARM_MMU_SMALL_PAGE_BASE_SHIFT)) - 1U;
>     flags = ARM_MMU_SECT_FLAGS_TO_SMALL_PAGE(config->flags);
> 
>     while (i != iend) {
>       pt[i] = (i << ARM_MMU_SMALL_PAGE_BASE_SHIFT) | flags;
>       i = (i + 1U) & index_mask;
>     }

Cheers,

    Jan

> -----Original Message-----
> From: users <users-bounces at rtems.org> On Behalf Of Sebastian Huber
> Sent: Thursday, November 19, 2020 7:38 AM
> To: users at rtems.org
> Subject: Re: Acessing PL devices of Xilinx Zedboard
> 
> Hello Jonathan,
> 
> On 18/11/2020 17:00, Jonathan Brandmeyer wrote:
> >
> > Caveat: My information could be a little out of date.  We're still
> > running on a pre-release version of RTEMS 5.0.  But hopefully this
> > points you in the right direction.  In particular, I know that some
> > work has been done to support 4kB pages, but I don't know if the entry
> > point
> arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache
> > currently uses that support or not.
> 
> the 4KiB pages MMU configuration was added with this commit:
> 
> commit f9648baf65ecec2cd01c96557a677ad6ecc06b11
> Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
> Date:   Mon Oct 28 10:15:28 2019 +0100
> 
>      bsps/arm: Add support for small pages MMU
> 
>      The small page MMU support reduces the granularity for memory settings
>      through the MMU from 1MiB sections to 4KiB small pages.
> 
>      Enable it by default on the realview_pbx_a9_qemu BSP.
> 
> A BSP needs some minor changes to support it.
> 
> --
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