Running SPARC/LEON3 in TSIM-LEON3 simulator

[Đức Anh]

Hi Jiri,

Thanks for the suggestion. It works. However, it looks like it just
simulates the instruction. I am looking for a cycle-accurate simulator and
can provide the performance information on each core. Do you know any?

Best,
Duc Anh

On Fri, 11 Jun 2021 at 22:10, Jiri Gaisler <jiri at gaisler.se> wrote:

>
> On 6/11/21 12:37 PM, Đức Anh wrote:
>
> Hi Sebastian,
>
> Thank you. I didn't notice that.
>
> I recompile with SMP enabled, and the application doesn't run successfully
> in the TSIM-LEON3 simulator. Below is the error message:
>
> Initializing and starting from 0x40000000
>>
>>   CPU 0 in error mode (tt=0x80, trap instruction)
>>   (In trap table for tt=0x02, illegal instruction)
>>       70150  40000020  91d02000   ta        0
>>  start + 0x20
>
>
> The thing is, the same code will work if I compile with SMP disabled. When
> the SMP is enabled, the simulator will crash like above, even with the
> simple hello world application.
>
> Have anyone here run into a similar issue? Or do you know any other leon3
> (or sparc) simulator that I can try?
>
>
> You can try with sis:
>
> sparc-rtem6-sis -leon3 -m 4 hello.exe
>
> Should work without problems. For SMP, you need the '-m 4' switch to
> enable 4 cores ...
>
> Jiri.
>
>
>
> Best regards,
> Duc Anh
>
> On Wed, 9 Jun 2021 at 18:46, Sebastian Huber <
> sebastian.huber at embedded-brains.de> wrote:
>
>> On 09/06/2021 18:39, Đức Anh wrote:
>> > - Is there a way to enable SMP for SPARC/LEON3 in RTEMS 6?
>>
>> Just set "RTEMS_SMP = True" in your config.ini:
>>
>>
>> https://docs.rtems.org/branches/master/user/bld/index.html#migration-from-autoconf-automake
>>
>> --
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